PIC24FJ256GB106-I/MR Microchip Technology, PIC24FJ256GB106-I/MR Datasheet - Page 203

IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64

PIC24FJ256GB106-I/MR

Manufacturer Part Number
PIC24FJ256GB106-I/MR
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64
Manufacturer
Microchip Technology
Series
PIC® 24Fr

Specifications of PIC24FJ256GB106-I/MR

Controller Family/series
PIC24
No. Of I/o's
51
Ram Memory Size
16KB
Cpu Speed
32MHz
No. Of Timers
5
Core Size
16 Bit
Program Memory Size
256KB
Peripherals
ADC, Comparator, PWM, RTC, Timer
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Number Of I /o
51
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
52
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ256GB106-I/MR
Manufacturer:
TI
Quantity:
1 292
17.3
The USB OTG module has many conditions that can
be configured to cause an interrupt. All interrupt
sources use the same interrupt vector.
Figure 17-4 shows the interrupt logic for the USB mod-
ule. There are two layers of interrupt registers in the
USB module. The top level consists of overall USB sta-
tus interrupts; these are enabled and flagged in the
U1IE and U1IR registers, respectively. The second
level consists of USB error conditions, which are
enabled and flagged in the U1EIR and U1EIE registers.
An interrupt condition in any of these triggers a USB
Error Interrupt Flag (UERRIF) in the top level.
FIGURE 17-4:
© 2008 Microchip Technology Inc.
USB Interrupts
CRC5EE (EOFEE)
CRC5EF (EOFEF)
Second Level (USB Error) Interrupts
CRC16EE
CRC16EF
DFN8EE
DFN8EF
DMAEF
DMAEE
BTOEE
BTOEF
BTSEF
BTSEE
PIDEE
PIDEF
Top Level (USB Status) Interrupts
USB OTG INTERRUPT FUNNEL
Top Level (USB OTG) Interrupts
PIC24FJ256GB110 FAMILY
Preliminary
URSTIE (DETACHIE)
URSTIF (DETACHIF)
17.3.1
Unlike device level interrupts, the USB OTG interrupt
status flags are not freely writable in software. All USB
OTG flag bits are implemented as hardware set only
bits. Additionally, these bits can only be cleared in soft-
ware by writing a ‘1’ to their locations (i.e., performing
a MOV type instruction). Writing a ‘0’ to a flag bit (i.e., a
BCLR instruction) has no effect.
RESUMEIF
RESUMEIE
ATTACHIE
ATTACHIF
SESENDIE
VBUSVDIE
T1MSECIF
SESENDIF
VBUSVDIF
Note:
(UERRIF)
TIMSECIE
LSTATEIE
LSTATEIF
STALLIE
STALLIF
SESVDIE
SESVDIF
UERRIE
ACTVIE
IDLEIE
ACTVIF
IDLEIF
TRNIE
SOFIE
TRNIF
SOFIF
IDIF
IDIE
CLEARING USB OTG INTERRUPTS
Throughout this data sheet, a bit that can
only be cleared by writing a ‘1’ to its loca-
tion is referred to as “Write 1 to clear”. In
register descriptions, this function is
indicated by the descriptor “K”.
Set USB1IF
DS39897B-page 201

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