PIC24FJ256GB106-I/MR Microchip Technology, PIC24FJ256GB106-I/MR Datasheet - Page 217

• Manufacturer Part Number: PIC24FJ256GB106-I/MR
• Description: IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256GB106-I/MR

• Controller Family/series: PIC24
• No. Of I/o's: 51
• Ram Memory Size: 16KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Core Size: 16 Bit
• Program Memory Size: 256KB
• Peripherals: ADC, Comparator, PWM, RTC, Timer
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART, USB OTG
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

17.7.2
REGISTER 17-14: U1OTGIR: USB OTG INTERRUPT STATUS REGISTER (HOST MODE ONLY)
© 2008 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/K-0, HS
Note:
IDIF
U-0
—
V
USB INTERRUPT REGISTERS
Individual bits can only be cleared by writing a ‘1’ to the bit position as part of a word write operation on the
entire register. Using Boolean instructions or bitwise operations to write to a single bit position will cause
all set bits at the moment of the write to become cleared.
BUS
Unimplemented: Read as ‘0’
IDIF: ID State Change Indicator bit
1 = Change in ID state detected
0 = No ID state change
T1MSECIF: 1 Millisecond Timer bit
1 = The 1 millisecond timer has expired
0 = The 1 millisecond timer has not expired
LSTATEIF: Line State Stable Indicator bit
1 = USB line state (as defined by the SE0 and JSTATE bits) has been stable for 1 ms, but different from
0 = USB line state has not been stable for 1 ms
ACTVIF: Bus Activity Indicator bit
1 = Activity on the D+/D- lines or V
0 = No activity on the D+/D- lines or V
SESVDIF: Session Valid Change Indicator bit
1 = V
0 = V
SESENDIF: B-Device V
1 = V
0 = V
Unimplemented: Read as ‘0’
VBUSVDIF A-Device V
1 = V
0 = No V
T1MSECIF
R/K-0, HS
threshold crossings may be either rising or falling.
last time
Specification)
Specification)
U-0
—
BUS
BUS
BUS
BUS
BUS
BUS
change on B-device detected; V
has crossed V
has not crossed V
has not crossed V
change on A-device detected; V
change on A-device detected
K = Write ‘1’ to clear bit
‘1’ = Bit is set
R/K-0, HS
LSTATEIF
(1)
(1)
U-0
—
BUS
BUS
A
_
SESS
Change Indicator bit
A
Change Indicator bit
A
_
_
SESS
SESS
R/K-0, HS
PIC24FJ256GB110 FAMILY
_
ACTVIF
END
U-0
—
BUS
Preliminary
_
_
END
END
(as defined in the USB OTG Specification)
BUS
detected
BUS
BUS
detected
U = Unimplemented bit, read as ‘0’
HS = Hardware Settable bit
‘0’ = Bit is cleared
R/K-0, HS
SESVDIF
has crossed V
has crossed V
U-0
—
SESENDIF
R/K-0, HS
B
A
_
_
SESS
VBUS
U-0
—
_
_
END
VLD
(as defined in the USB OTG
x = Bit is unknown
(as defined in the USB OTG
U-0
U-0
—
—
(1)
DS39897B-page 215
VBUSVDIF
R/K-0, HS
U-0
—
bit 8
bit 0