P89LPC912FDH NXP Semiconductors, P89LPC912FDH Datasheet - Page 12

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P89LPC912FDH

Manufacturer Part Number
P89LPC912FDH
Description
MCU 8BIT 80C51 1K FLASH, TSSOP14
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P89LPC912FDH

Controller Family/series
(8051) 8052
Core Size
8bit
No. Of I/o's
12
Program Memory Size
1KB
Ram Memory Size
128Byte
Cpu Speed
18MHz
Oscillator Type
External, Internal
No. Of Timers
4
No. Of
RoHS Compliant

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NXP Semiconductors
Table 5.
P89LPC912_913_914_5
Product data sheet
Symbol
P0.2,
P0.4 to P0.6
P0.2/CIN2A/
KBI2
P0.4/CIN1A/
KBI4
P0.5/CMPREF/
KBI5
P0.6/CMP1/
KBI6
P1.0, P1.1,
P1.5
P1.0/TXD
P1.1/RXD
P1.5/RST
P89LPC913 pin description
Pin
13
12
11
5
9
6
3
Type
I/O
I/O
I
I
I/O
I
I
I/O
I
I
I/O
O
I
I/O
(P1.0,
P1.1);
I (P1.5)
I/O
O
I/O
I
I
I
Description
Port 0: Port 0 is a 4-bit I/O port with a user-configurable output type. During reset
Port 0 latches are configured in the input only mode with the internal pull-up
disabled. The operation of Port 0 pins as inputs and outputs depends upon the port
configuration selected. Each port pin is configured independently. Refer to
8.12.1 “Port configurations”
The Keypad Interrupt feature operates with Port 0 pins.
All pins have Schmitt triggered inputs.
Port 0 also provides various special functions as described below:
P0.2 — Port 0 bit 2.
CIN2A — Comparator 2 positive input A.
KBI2 — Keyboard input 2.
P0.4 — Port 0 bit 4.
CIN1A — Comparator 1 positive input A.
KBI4 — Keyboard input 4.
P0.5 — Port 0 bit 5.
CMPREF — Comparator reference (negative) input.
KBI5 — Keyboard input 5.
P0.6 — Port 0 bit 6.
CMP1 — Comparator 1 output.
KBI6 — Keyboard input 6.
Port 1: Port 1 is a 3-bit I/O port with a user-configurable output type, except for P1.5
noted below. During reset Port 1 latches are configured in the input only mode with
the internal pull-up disabled. The operation of the configurable Port 1 pins as inputs
and outputs depends upon the port configuration selected. Each of the configurable
port pins are programmed independently. Refer to
configurations”
All pins have Schmitt triggered inputs.
Port 1 also provides various special functions as described below:
P1.0 — Port 1 bit 0.
TXD — Transmitter output for the serial port.
P1.1 — Port 1 bit 1.
RXD — Receiver input for the serial port.
P1.5 — Port 1 bit 5 (input only).
RST — External Reset input during Power-on or if selected via UCFG1. When
functioning as a reset input, a LOW on this pin resets the microcontroller, causing
I/O ports and peripherals to take on their default states, and the processor begins
execution at address 0. Also used during a power-on sequence to force ISP mode.
When using an oscillator frequency above 12 MHz, the reset input function of
P1.5 must be enabled. An external circuit is required to hold the device in
reset at power-up until V
power is removed V
voltage. When using an oscillator frequency above 12 MHz, in some
applications, an external brownout detect circuit may be required to hold the
device in reset when V
voltage.
Rev. 05 — 28 September 2007
and
Table 13 “Static characteristics”
DD
DD
will fall below the minimum specified operating
DD
8-bit microcontrollers with two-clock 80C51 core
falls below the minimum specified operating
and
has reached its specified level. When system
Table 13 “Static characteristics”
P89LPC912/913/914
Section 8.12.1 “Port
for details. P1.5 is input only.
© NXP B.V. 2007. All rights reserved.
for details.
Section
12 of 66

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