P89LPC912FDH NXP Semiconductors, P89LPC912FDH Datasheet - Page 43

• Manufacturer Part Number: P89LPC912FDH
• Description: MCU 8BIT 80C51 1K FLASH, TSSOP14
• Manufacturer: NXP Semiconductors

Specifications of P89LPC912FDH

• Controller Family/series: (8051) 8052
• Core Size: 8bit
• No. Of I/o's: 12
• Program Memory Size: 1KB
• Ram Memory Size: 128Byte
• Cpu Speed: 18MHz
• Oscillator Type: External, Internal
• No. Of Timers: 4
• No. Of: RoHS Compliant

NXP Semiconductors
P89LPC912_913_914_5
Product data sheet
8.19.1 Typical SPI configurations
Typical connections are shown in
Fig 18. SPI single master single slave configuration
•
•
•
SPICLK, MOSI and MISO are typically tied together between two or more SPI
devices. Data flows from master to slave on MOSI (Master Out Slave In) pin and flows
from slave to master on MISO (Master In Slave Out) pin. The SPICLK signal is output
in the master mode and is input in the slave mode. If the SPI system is disabled, i.e.
SPEN (SPCTL.6) = 0 (reset value), these pins are configured for port functions.
SS is the optional slave select pin. In a typical configuration, an SPI master asserts
one of its port pins to select one SPI device as the current slave. An SPI slave device
uses its SS pin to determine whether it is selected.
The P89LPC913 does not have the slave select pin, SS. The SPI interface is set to
Master mode and an I/O pin may be used to implement the SS function. Typical
connections are shown in
GENERATOR
8-BIT SHIFT
SPI CLOCK
REGISTER
master
Rev. 05 — 28 September 2007
MISO
MOSI
SPICLK
PORT
Figure 18
Figure
8-bit microcontrollers with two-clock 80C51 core
and
18, 19, and 20.
Figure
P89LPC912/913/914
19.
SPICLK
MISO
MOSI
SS
8-BIT SHIFT
REGISTER
© NXP B.V. 2007. All rights reserved.
slave
002aaa901
43 of 66