P89LPC912FDH NXP Semiconductors, P89LPC912FDH Datasheet - Page 57

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P89LPC912FDH

Manufacturer Part Number
P89LPC912FDH
Description
MCU 8BIT 80C51 1K FLASH, TSSOP14
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P89LPC912FDH

Controller Family/series
(8051) 8052
Core Size
8bit
No. Of I/o's
12
Program Memory Size
1KB
Ram Memory Size
128Byte
Cpu Speed
18MHz
Oscillator Type
External, Internal
No. Of Timers
4
No. Of
RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P89LPC912FDH
Manufacturer:
ON
Quantity:
500
Part Number:
P89LPC912FDH
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
Table 15.
V
T
[1]
[2]
P89LPC912_913_914_5
Product data sheet
Symbol
t
SPIF
amb
DD
Fig 24. Shift register mode timing
Fig 25. External clock timing
= 3.0 V to 3.6 V, unless otherwise specified.
Parameters are valid over operating temperature range unless otherwise specified. Parts are tested to 2 MHz, but are guaranteed to
operate down to 0 Hz.
When using an oscillator frequency above 12 MHz, the reset input function of P1.5 must be enabled. An external circuit is required to
hold the device in reset at power-up until V
minimum specified operating voltage. When using an oscillator frequency above 12 MHz, in some applications, an external brownout
detect circuit may be required to hold the device in reset when V
= 40 C to +85 C for industrial, 40 C to +125 C for extended, unless otherwise specified.
Parameter
SPI fall time
write to SBUF
Dynamic characteristics (P89LPC912, P89LPC913)
output data
SPI outputs (SPICLK, MOSI,
MISO)
SPI inputs (SPICLK, MOSI,
MISO, SS)
input data
clear RI
11.1 Waveforms
clock
V
DD
t
0.45 V
QVXH
0.5 V
t
XHDV
0.2V
0.2V
valid
T
0
DD
XLXL
DD
0.1 V
t
XHDX
0.9 V
t
DD
XHQX
valid
has reached its specified level. When system power is removed V
1
Conditions
see
27, 28,
Rev. 05 — 28 September 2007
Figure
29
t
valid
CHCL
2
26,
DD
valid
falls below the minimum specified operating voltage.
3
…continued
8-bit microcontrollers with two-clock 80C51 core
t
CLCX
Min
-
-
valid
4
T
Variable clock
cy(clk)
P89LPC912/913/914
t
CLCH
t
CHCX
valid
5
2000
Max
100
valid
6
002aaa907
[1]
f
Min
osc
-
-
valid
DD
set TI
set RI
7
© NXP B.V. 2007. All rights reserved.
= 18 MHz
002aaa906
will fall below the
2000
Max
100
57 of 66
Unit
ns
ns

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