PIC16F628AT-E/SS Microchip Technology, PIC16F628AT-E/SS Datasheet - Page 121

• Manufacturer Part Number: PIC16F628AT-E/SS
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F628AT-E/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3DBF648 - BOARD DAUGHTER ICEPIC3AC162053 - HEADER INTERFACE ICD,ICD2 18DIP
• Data Converters: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

© 2009 Microchip Technology Inc.
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0 ≤ f ≤ 127
0 ≤ b < 7
skip if (f<b>) = 1
None
01
If bit ‘b’ in register ‘f’ is ‘1’, then
the next instruction is skipped.
If bit ‘b’ is ‘1’, then the next
instruction fetched during the
current instruction execution, is
discarded and a NOP is executed
instead, making this a two-cycle
instruction.
1
1(2)
HERE
FALSE
TRUE
Before Instruction
After Instruction
if FLAG<1> = 1,
PC = address HERE
if FLAG<1> = 0,
PC =
PC =
11bb
BTFSS
GOTO
•
•
•
address FALSE
address TRUE
bfff
REG1
PROCESS_CODE
ffff
PIC16F627A/628A/648A
CALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
CLRF
Encoding:
Description:
Words:
Cycles:
Example
Status Affected:
Operands:
Operation:
Syntax:
Call Subroutine
[ label ] CALL k
0 ≤ k ≤ 2047
(PC)+ 1→ TOS,
k → PC<10:0>,
(PCLATH<4:3>) → PC<12:11>
None
10
Call Subroutine. First, return
address (PC + 1) is pushed onto
the stack. The eleven bit imme-
diate address is loaded into PC
bits <10:0>. The upper bits of
the PC are loaded from
PCLATH. CALL is a two-cycle
instruction.
1
2
HERE
Before Instruction
After Instruction
Clear f
[ label ] CLRF
0 ≤ f ≤ 127
00h → (f)
1 → Z
Z
00
The contents of register ‘f’ are
cleared and the Z bit is set.
1
1
CLRF
Before Instruction
After Instruction
PC
PC
TOS = Address HERE+1
REG1
REG1
Z
0kkk
CALL
0001
REG1
= Address HERE
= Address THERE
DS40044G-page 121
= 0x5A
= 0x00
= 1
f
kkkk
THERE
1fff
kkkk
ffff