PIC16F628AT-E/SS Microchip Technology, PIC16F628AT-E/SS Datasheet - Page 17

• Manufacturer Part Number: PIC16F628AT-E/SS
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F628AT-E/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3DBF648 - BOARD DAUGHTER ICEPIC3AC162053 - HEADER INTERFACE ICD,ICD2 18DIP
• Data Converters: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.0
4.1
The PIC16F627A/628A/648A has a 13-bit program
counter capable of addressing an 8K x 14 program
memory space. Only the first 1K x 14 (0000h-03FFh)
for the PIC16F627A, 2K x 14 (0000h-07FFh) for the
PIC16F628A and 4K x 14 (0000h-0FFFh) for the
PIC16F648A are physically implemented. Accessing a
location above these boundaries will cause a wrap-
around within the first 1K x 14 space (PIC16F627A),
2K x 14 space (PIC16F628A) or 4K x 14 space
(PIC16F648A). The Reset vector is at 0000h and the
interrupt vector is at 0004h (Figure 4-1).
FIGURE 4-1:
© 2009 Microchip Technology Inc.
CALL, RETURN
RETFIE, RETLW
MEMORY ORGANIZATION
Program Memory Organization
On-chip Program
PIC16F627A,
PIC16F628A and
PIC16F648A
PIC16F628A and
PIC16F648A only
On-chip Program
On-chip Program
Stack Level 1
Stack Level 2
Stack Level 8
Reset Vector
Interrupt Vector
PIC16F648A
Memory
PC<12:0>
Memory
Memory
PROGRAM MEMORY MAP
AND STACK
13
1FFFh
07FFh
000h
0004
0005
03FFh
0FFFh
PIC16F627A/628A/648A
4.2
The data memory (Figure 4-2 and Figure 4-3) is
partitioned into four banks, which contain the General
Purpose Registers (GPRs) and the Special Function
Registers (SFRs). The SFRs are located in the first 32
locations of each bank. There are General Purpose
Registers implemented as static RAM in each bank.
Table 4-1 lists the General Purpose Register available
in each of the four banks.
TABLE 4-1:
Addresses F0h-FFh, 170h-17Fh and 1F0h-1FFh are
implemented as common RAM and mapped back to
addresses 70h-7Fh.
Table 4-2 lists how to access the four banks of registers
via the Status register bits RP1 and RP0.
TABLE 4-2:
4.2.1
The register file is organized as 224 x 8 in the
PIC16F627A/628A and 256 x 8 in the PIC16F648A.
Each is accessed either directly or indirectly through
the File Select Register (FSR), See Section 4.4
“Indirect Addressing, INDF and FSR Registers”.
Bank0
Bank1
Bank2
Bank3
Bank
Data Memory Organization
0
1
2
3
GENERAL PURPOSE REGISTER
FILE
120h-14Fh, 170h-17Fh
PIC16F627A/628A
GENERAL PURPOSE STATIC
RAM REGISTERS
ACCESS TO BANKS OF
REGISTERS
1F0h-1FFh
A0h-FF
20-7Fh
RP1
0
0
1
1
DS40044G-page 17
PIC16F648A
1F0h-1FFh
120h-17Fh
A0h-FF
20-7Fh
RP0
0
1
0
1