PIC16F628AT-E/SS Microchip Technology, PIC16F628AT-E/SS Datasheet - Page 80

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC

PIC16F628AT-E/SS

Manufacturer Part Number
PIC16F628AT-E/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets

Specifications of PIC16F628AT-E/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DBF648 - BOARD DAUGHTER ICEPIC3AC162053 - HEADER INTERFACE ICD,ICD2 18DIP
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F627A/628A/648A
FIGURE 12-1:
Follow these steps when setting up an Asynchronous
Transmission:
1.
2.
3.
4.
5.
6.
7.
8.
FIGURE 12-2:
DS40044G-page 80
RB2/TX/CK (pin)
TXIF bit
(Transmit buffer
TRISB<1> and TRISB<2> should both be set to
‘1’ to configure the RB1/RX/DT and RB2/TX/CK
pins as inputs. Output drive, when required, is
controlled by the peripheral circuitry.
Initialize the SPBRG register for the appropriate
baud rate. If a high-speed baud rate is desired,
set bit BRGH. (Section 12.1 “USART Baud
Rate Generator (BRG)”).
Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
If interrupts are desired, then set enable bit
TXIE.
If 9-bit transmission is desired, then set transmit
bit TX9.
Enable the transmission by setting bit TXEN,
which will also set bit TXIF.
If 9-bit transmission is selected, the ninth bit
should be loaded in bit TX9D.
Load data to the TXREG register (starts
transmission).
reg. empty flag)
TRMT bit
(Transmit shift
reg. empty flag)
Write to TXREG
BRG output
(shift clock)
TXIE
Interrupt
USART TRANSMIT BLOCK DIAGRAM
ASYNCHRONOUS TRANSMISSION
TXEN
TXIF
Baud Rate Generator
Word 1
Transmit Shift Reg.
Word 1
SPBRG
Baud Rate CLK
Start bit
MSb
(8)
TX9D
bit 0
TSR register
TX9
TXREG register
² ² ²
8
Data Bus
bit 1
Word 1
LSb
0
TRMT
Pin Buffer
and Control
bit 7/8
© 2009 Microchip Technology Inc.
SPEN
Stop bit
RB2/TX/CK pin

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