PIC16F628AT-E/SS Microchip Technology, PIC16F628AT-E/SS Datasheet - Page 28

• Manufacturer Part Number: PIC16F628AT-E/SS
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F628AT-E/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3DBF648 - BOARD DAUGHTER ICEPIC3AC162053 - HEADER INTERFACE ICD,ICD2 18DIP
• Data Converters: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F627A/628A/648A
4.2.2.5
This register contains interrupt flag bits.
REGISTER 4-5:
DS40044G-page 28
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
PIR1 Register
PIR1 – PERIPHERAL INTERRUPT REGISTER 1 (ADDRESS: 0Ch)
bit 7
EEIF: EEPROM Write Operation Interrupt Flag bit
1 = The write operation completed (must be cleared in software)
0 = The write operation has not completed or has not been started
CMIF: Comparator Interrupt Flag bit
1 = Comparator output has changed
0 = Comparator output has not changed
RCIF: USART Receive Interrupt Flag bit
1 = The USART receive buffer is full
0 = The USART receive buffer is empty
TXIF: USART Transmit Interrupt Flag bit
1 = The USART transmit buffer is empty
0 = The USART transmit buffer is full
Unimplemented: Read as ‘0’
CCP1IF: CCP1 Interrupt Flag bit
Capture Mode
Compare Mode
PWM Mode
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1 = TMR2 to PR2 match occurred (must be cleared in software)
0 = No TMR2 to PR2 match occurred
1 = TMR1 register overflowed (must be cleared in software)
0 = TMR1 register did not overflow
Legend:
R = Readable bit
-n = Value at POR
TMR1IF: TMR1 Overflow Interrupt Flag bit
R/W-0
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
Unused in this mode
EEIF
R/W-0
CMIF
RCIF
R-0
W = Writable bit
‘1’ = Bit is set
TXIF
R-0
Note:
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
Interrupt flag bits get set when an interrupt
condition occurs regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User
software should ensure the appropriate
interrupt flag bits are clear prior to
enabling an interrupt.
U-0
—
CCP1IF
R/W-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
TMR2IF
R/W-0
TMR1IF
R/W-0
bit 0