EVAL-AD9880-ABZ Analog Devices Inc, EVAL-AD9880-ABZ Datasheet - Page 49

• Manufacturer Part Number: EVAL-AD9880-ABZ
• Description: Video Input Module Kit AD9880
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD9880-ABZ

• Main Purpose: Video, Video Processing
• Embedded: No
• Utilized Ic / Part: AD9880
• Primary Attributes: HDMI Receiver & Analog Interface
• Secondary Attributes: Triple 8-bit 150MSPS ADC's
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

COLOR SPACE CONVERSION
0x34
Table 74. Color space Converter
Select
0
1
0x35
Table 75. CSC Fixed Point Converter Mode
Select
00
01
1×
0x35
0x36
0x37
See the Register 0x35 section.
The default power up values for the color space con-
verter coefficients (R0x35 through R0x4C) are set for
ATSC RGB to YCbCr conversion. They are completely
programmable for other conversions.
1
This bit enables the color space converter. The power-
up default setting is 0.
6-5 Color space Converter Mode
These two bits set the fixed point position of the CSC
coefficients, including the A4, B4, and C4 offsets.
4-0
These 5 bits form the 5 MSBs of the Color space
Conversion Coefficient A1. This combined with the
8 LSBs of the following register form a 13-bit twos
complement coefficient which is user programmable.
The equation takes the form of:
R
G
B
The default value for the 13 bit A1 coefficient is
0x0C52.
7-0
4-0
These five bits form the 5 MSBs of the Color space
Conversion Coefficient A2. Combined with the 8
LSBs of the following register they form a 13 bit twos
complement coefficient that is user programmable.
The equation takes the form of:
R
G
B
The default value for the 13-bit A2 coefficient is
0x0800.
OUT
OUT
OUT
OUT
OUT
OUT
Result
Disable color space converter
Enable color space converter
= (A1 × R
= (C1 × R
= (A1 × R
= (C1 × R
= (B1 × R
= (B1 × R
Result
±1.0, −4096 to 4095
±2.0, −8192 to 8190
±4.0, −16384 to 16380
Color space Converter Enable
Color space Conversion Coefficient A1 MSBs
Color space Conversion Coefficient A1 LSBs
CSC A2 MSBs
IN
IN
IN
IN
IN
IN
) + (C2 × G
) + (C2 × G
) + (A2 × G
) + (B2 × G
) + (A2 × G
) + (B2 × G
IN
IN
IN
IN
IN
IN
) + (B3 × B
) + (C3 × B
) + (B3 × B
) + (C3 × B
) + (A3 × B
) + (A3 × B
IN
IN
IN
IN
IN
IN
) + B4
) + B4
) + C4
) + C4
) + A4
) + A4
Rev. 0 | Page 49 of 64
0x38
0x39
0x3A
0x3B
0x3C
0x3D
0x3E
0x3F
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x57
0x57
0x57
0x57
0x58
0x58
See the Register 0x37 section.
The default value for the 13-bit A3 is 0x0000.
The default value for the 13-bit A4 is 0x19D7.
The default value for the 13-bit B1 is 0x1C54.
The default value for the 13-bit B2 is 0x0800.
The default value for the 13-bit B4 is 0x0291.
The default value for the 13-bit C1 is 0x0000.
The default value for the 13-bit C3 is 0x0E87.
This bit enables the use of the analog PLL.
7-0
4-0
7-0
4-0
7-0
4-0
7-0
4-0
7-0
4-0
The default value for the 13-bit B3 is 0x1E89.
7-0
4-0
7-0
4-0
7-0
4-0
The default value for the 13 bit C2 is 0x0800.
7-0
4-0
7-0
4-0
The default value for the 13-bit C4 is 0x18BD.
7-0
7
6
3
2
7
6-4
These bits control the division of the MCLK out of the
PLL.
CSC A2 LSBs
CSC A3 MSBs
CSC A3 LSBs
CSC A4 MSBs
CSC A4 LSBs
CSC B1 MSBs
CSC B1 LSBs
CSC B2 MSB
CSC B2 LSBs
CSC B3 MSBs
CSC B3 LSBs
CSC B4 MSBs
CSC B4 LSBs
CSC C1 MSBs
CSC C1 LSBs
CSC C2 MSBs
CSC C3 MSBs
CSC C3 LSBs
CSC C4 MSBs
CSC C4 LSBs
A/V Mute Override
A/V Mute Value
Disable AV Mute
Disable Audio Mute
MCLK PLL Enable
MCLK PLL_N
CSC C2 LSBs
AD9880