This N-Channel logic Level MOSFETs are produced using Fairchild Semiconductor‘s advanced Power Trench® process that has been special tailored to minimize the on-state resistance and yet maintain superior switching performance
This N-Channel logic Level MOSFETs are produced using Fairchild Semiconductor‘s advanced Power Trench® process that has been special tailored to minimize the on-state resistance and yet maintain superior switching performance
This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced Power Trench® process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance
... V = – GEN V = –30V –4 – –3.2 A (Note Min Typ Max Units 90 mJ –4.5 A –60 V –49 mV/°C µA –1 100 nA –100 nA –1 –1.6 – mV/°C 76 mΩ 100 99 130 137 185 – 759 2.5 nC 3.0 nC –3.2 A –0.8 –1.2 V FDD5614P Rev C1(W) ...
... Maximum current is calculated as where P is maximum power dissipation 25°C and determined by the user's board design. θCA = 40°C/W when mounted on a θJA 2 1in pad copper and V = 10V. Package current limitation is 21A DS(on) J(max 96°C/W when mounted θ minimum pad. FDD5614P Rev C1(W) ...
... Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature -3.5V GS -4.0V -4.5V -5.0V -6.0V -10V DRAIN CURRENT ( -2 125 GATE TO SOURCE VOLTAGE (V) GS Gate-to-Source Voltage 125 -55 C 0.2 0.4 0.6 0 BODY DIODE FORWARD VOLTAGE (V) SD FDD5614P Rev C1( 1.4 ...
... Figure 10. Single Pulse Maximum 0.01 0 TIME (sec 1MHz ISS C OSS DRAIN TO SOURCE VOLTAGE (V) DS SINGLE PULSE R = 96°C/W θ 25° 100 t , TIME (sec) 1 Power Dissipation. R ( θJA θ 96°C/W θJA P( (t) θ Duty Cycle 100 1000 FDD5614P Rev C1(W) 60 1000 ...
... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ACEx™ FAST ActiveArray™ FASTr™ Bottomless™ FPS™ CoolFET™ FRFET™ CROSSVOLT™ GlobalOptoisolator™ ...