PH3120L,115 NXP Semiconductors, PH3120L,115 Datasheet

MOSFET N-CH 20V 100A LFPAK

PH3120L,115

Manufacturer Part Number
PH3120L,115
Description
MOSFET N-CH 20V 100A LFPAK
Manufacturer
NXP Semiconductors
Series
TrenchMOS™r
Datasheet

Specifications of PH3120L,115

Package / Case
LFPak-4
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
2.65 mOhm @ 25A, 10V
Drain To Source Voltage (vdss)
20V
Current - Continuous Drain (id) @ 25° C
100A
Vgs(th) (max) @ Id
2V @ 1mA
Gate Charge (qg) @ Vgs
48.5nC @ 4.5V
Input Capacitance (ciss) @ Vds
4457pF @ 10V
Power - Max
62.5W
Mounting Type
Surface Mount
Gate Charge Qg
48.5 nC
Minimum Operating Temperature
- 55 C
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
2.25 mOhms
Drain-source Breakdown Voltage
20 V
Gate-source Breakdown Voltage
20 V
Continuous Drain Current
100 A
Power Dissipation
62.5 W
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2178-2
934057822115
PH3120L T/R

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PH3120L,115
Manufacturer:
PANASONIC
Quantity:
73 000
1. Product profile
1.1 General description
1.2 Features and benefits
1.3 Applications
1.4 Quick reference data
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
Table 1.
Symbol Parameter
V
I
P
Dynamic characteristics
Q
Static characteristics
R
D
DS
tot
GD
DSon
Higher operating power due to low
thermal resistance
Low conduction losses due to low
on-state resistance
DC-to-DC convertors
Notebook computers
PH3120L
N-channel TrenchMOS logic level FET
Rev. 03 — 30 March 2009
drain-source voltage T
drain current
total power
dissipation
gate-drain charge
drain-source
on-state resistance
Quick reference
Conditions
T
see
T
V
V
see
V
T
see
j
mb
mb
j
GS
DS
GS
≥ 25 °C; T
= 25 °C; see
Figure
Figure 11
Figure 10
= 25 °C; V
= 25 °C; see
= 10 V; T
= 4.5 V; I
= 10 V; I
1; see
j
D
≤ 150 °C
D
j
= 25 °C;
GS
= 25 A;
= 50 A;
Figure
Figure 2
= 10 V;
Figure 3
9;
Suitable for logic level gate drive
sources
Portable equipment
Switched-mode power supplies
Min
-
-
-
-
-
Product data sheet
Typ
-
-
-
12.8
2.25
Max
20
100
62.5
-
2.65
Unit
V
A
W
nC
mΩ

Related parts for PH3120L,115

PH3120L,115 Summary of contents

Page 1

PH3120L N-channel TrenchMOS logic level FET Rev. 03 — 30 March 2009 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET plastic package using TrenchMOS technology. This product is designed and qualified for ...

Page 2

... NXP Semiconductors 2. Pinning information Table 2. Pinning information Pin Symbol Description 1 S source 2 S source 3 S source 4 G gate mb D mounting base; connected to drain 3. Ordering information Table 3. Ordering information Type number Package Name Description PH3120L LFPAK plastic single-ended surface-mounted package (LFPAK); 4 leads 4 ...

Page 3

... NXP Semiconductors 120 I der (%) 100 Fig 1. Normalized continuous drain current as a function of mounting base temperature Limit (A) DSon Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage PH3120L_3 Product data sheet 003aaa628 120 P der (%) 150 200 0 T (°C) mb Fig 2 ...

Page 4

... NXP Semiconductors 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter R thermal resistance from junction to th(j-mb) mounting base 10 Z th(j-mb) (K/W) δ = 0.5 1 0.2 0.1 0.05 0.02 single pulse - Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration PH3120L_3 Product data sheet ...

Page 5

... NXP Semiconductors 6. Characteristics Table 6. Characteristics Symbol Parameter Static characteristics V drain-source (BR)DSS breakdown voltage V gate-source threshold GS(th) voltage I drain leakage current DSS I gate leakage current GSS R drain-source on-state DSon resistance Dynamic characteristics Q total gate charge G(tot) Q gate-source charge GS Q gate-drain charge GD C input capacitance ...

Page 6

... NXP Semiconductors 20 2 (A) 4 0.2 0.4 0.6 Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values 2.5 V GS(th) (V) 2 max 1.5 typ min 1 0 Fig 7. Gate-source threshold voltage as a function of junction temperature PH3120L_3 Product data sheet 003aaa362 (V) = 2.1 GS (A) ...

Page 7

... NXP Semiconductors 40 1.9 2 2.1 R DSon (mΩ Fig 9. Drain-source on-state resistance as a function of drain current; typical values ( Fig 11. Gate-source voltage as a function of gate charge; typical values PH3120L_3 Product data sheet 003aaa364 2 a 1.5 1 0.5 (V) = 2 (A) D Fig 10. Normalized drain-source on-state resistance factor as a function of junction temperature ...

Page 8

... NXP Semiconductors Fig 13. Source current as a function of source-drain voltage; typical values PH3120L_3 Product data sheet (A) 30 150 ° ° 0.2 0.4 0.6 0.8 Rev. 03 — 30 March 2009 PH3120L N-channel TrenchMOS logic level FET 003aaa366 1 V (V) SD © NXP B.V. 2009. All rights reserved. ...

Page 9

... NXP Semiconductors 7. Package outline Plastic single-ended surface-mounted package (LFPAK); 4 leads 1/2 DIMENSIONS (mm are the original dimensions) UNIT 1.20 0.15 1.10 0.50 mm 0.25 1.01 0.00 0.95 0.35 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION IEC SOT669 Fig 14 ...

Page 10

... Product data sheet Data sheet status Product data sheet The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Product data sheet Preliminary data sheet Rev. 03 — ...

Page 11

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 12

... NXP Semiconductors 11. Contents 1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 1.1 General description . . . . . . . . . . . . . . . . . . . . . .1 1.2 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 3 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 4 Limiting values Thermal characteristics . . . . . . . . . . . . . . . . . . .4 6 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . .10 9 Legal information 9.1 Data sheet status ...

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