PHD97NQ03LT,118 NXP Semiconductors, PHD97NQ03LT,118 Datasheet

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PHD97NQ03LT,118

Manufacturer Part Number
PHD97NQ03LT,118
Description
MOSFET N-CH TRENCH 25V SOT428
Manufacturer
NXP Semiconductors
Series
TrenchMOS™r
Datasheet

Specifications of PHD97NQ03LT,118

Package / Case
DPak, TO-252 (2 leads+tab), SC-63
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
6.3 mOhm @ 25A, 10V
Drain To Source Voltage (vdss)
25V
Current - Continuous Drain (id) @ 25° C
75A
Vgs(th) (max) @ Id
2.15V @ 1mA
Gate Charge (qg) @ Vgs
11.7nC @ 4.5V
Input Capacitance (ciss) @ Vds
1570pF @ 12V
Power - Max
107W
Mounting Type
Surface Mount
Minimum Operating Temperature
- 55 C
Configuration
Single
Transistor Polarity
NPN
Mounting Style
SMD/SMT
Power Dissipation
107 W
Maximum Operating Temperature
+ 175 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
934061139118
1. Product profile
1.1 General description
1.2 Features and benefits
1.3 Applications
1.4 Quick reference data
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
Table 1.
Symbol Parameter
V
I
P
Dynamic characteristics
Q
Static characteristics
R
D
DS
tot
GD
DSon
Fast switching
Lead-free packing
Logic level threshold
Computer motherboard high
frequency DC-to-DC convertors
PHD97NQ03LT
N-channel TrenchMOS logic level FET
Rev. 01 — 24 March 2009
drain-source voltage T
drain current
total power
dissipation
gate-drain charge
drain-source
on-state resistance
Quick reference
Conditions
T
see
T
V
V
see
V
T
see
j
mb
mb
j
GS
DS
GS
≥ 25 °C; T
= 25 °C; see
Figure
Figure 10
Figure 8
= 25 °C; V
= 25 °C; see
= 12 V; see
= 4.5 V; I
= 10 V; I
1; see
j
D
≤ 175 °C
D
GS
= 25 A;
= 25 A;
Figure
Figure
Figure 2
= 10 V;
Figure 3
7;
Low on-state resistance
Suitable for high frequency
applications due to fast switching
characteristics
Switched-mode power supplies
Voltage regulators
9;
Min
-
-
-
-
-
Product data sheet
Typ
-
-
-
1.9
5.3
Max
25
75
107
-
6.3
Unit
V
A
W
nC
mΩ

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PHD97NQ03LT,118 Summary of contents

Page 1

PHD97NQ03LT N-channel TrenchMOS logic level FET Rev. 01 — 24 March 2009 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET plastic package using TrenchMOS technology. This product is designed and qualified for ...

Page 2

... NXP Semiconductors 2. Pinning information Table 2. Pinning information Pin Symbol Description 1 G gate 2 D drain 3 S source mb D mounting base; connected to drain 3. Ordering information Table 3. Ordering information Type number Package Name PHD97NQ03LT SC-63; DPAK 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). ...

Page 3

... NXP Semiconductors 120 I der (%) 100 Fig 1. Normalized continuous drain current as a function of mounting base temperature ( −1 10 Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage PHD97NQ03LT_1 Product data sheet 003aab533 120 P der (%) 150 200 0 T (°C) j Fig 2. ...

Page 4

... NXP Semiconductors 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter R thermal resistance from junction to th(j-mb) mounting base R thermal resistance from junction to th(j-a) ambient [1] Mounted on a printed-circuit board; vertical in still air 10 Z th(j-mb) (K/W) 1 δ = 0.5 0.2 0.1 -1 0.05 10 0.02 single pulse -2 10 ...

Page 5

... NXP Semiconductors 6. Characteristics Table 6. Characteristics Symbol Parameter Static characteristics V drain-source (BR)DSS breakdown voltage V gate-source threshold GS(th) voltage I drain leakage current DSS I gate leakage current GSS R drain-source on-state DSon resistance I drain leakage current DSS R gate resistance G Dynamic characteristics Q total gate charge G(tot) ...

Page 6

... NXP Semiconductors Table 6. Characteristics …continued Symbol Parameter t turn-on delay time d(on) t rise time r t turn-off delay time d(off) t fall time f Source-drain diode V source-drain voltage SD t reverse recovery time rr Q recovered charge GS(th) (V) max 2 typ 1.5 min 1 0 Fig 5. Gate-source threshold voltage as a function of ...

Page 7

... NXP Semiconductors 2 a 1.6 1.2 0.8 0.4 0 − Fig 7. Normalized drain-source on-state resistance factor as a function of junction temperature ° Fig 9. Gate-source voltage as a function of gate charge; typical values PHD97NQ03LT_1 Product data sheet 003aab467 25 R DSon (mΩ 120 180 T (°C) j Fig 8. Drain-source on-state resistance as a function of drain current ...

Page 8

... NXP Semiconductors (pF Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values PHD97NQ03LT_1 Product data sheet 003aab542 ( iss oss C rss (V) DS Fig 12. Source current as a function of source-drain voltage; typical values Rev. 01 — 24 March 2009 PHD97NQ03LT N-channel TrenchMOS logic level FET 003aab541 175 ° ...

Page 9

... NXP Semiconductors 7. Package outline Plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped DIMENSIONS (mm are the original dimensions) UNIT 2.38 0.93 0.89 1.1 5.46 mm 2.22 0.46 0.71 0.9 5.00 OUTLINE VERSION IEC SOT428 Fig 13. Package outline SOT428 (DPAK) PHD97NQ03LT_1 Product data sheet ...

Page 10

... NXP Semiconductors 8. Revision history Table 7. Revision history Document ID Release date PHD97NQ03LT_1 20090324 PHD97NQ03LT_1 Product data sheet N-channel TrenchMOS logic level FET Data sheet status Change notice Product data sheet - Rev. 01 — 24 March 2009 PHD97NQ03LT Supersedes - © NXP B.V. 2009. All rights reserved. ...

Page 11

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 12

... NXP Semiconductors 11. Contents 1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 1.1 General description . . . . . . . . . . . . . . . . . . . . . .1 1.2 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 3 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 4 Limiting values Thermal characteristics . . . . . . . . . . . . . . . . . . .4 6 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . .10 9 Legal information 9.1 Data sheet status ...

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