PIC16F721-E/ML Microchip Technology, PIC16F721-E/ML Datasheet - Page 115

• Manufacturer Part Number: PIC16F721-E/ML
• Description: 7 KB FLASH, 256 B SRAM, 18 I/O 20 QFN 4x4mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F721-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.3.2
The PWM period is specified by the PR2 register of
Timer2. The PWM period can be calculated using the
formula of
EQUATION 15-1:
When TMR2 is equal to PR2, the following three events
occur on the next increment cycle:
• TMR2 is cleared
• The CCP1 pin is set. (Exception: If the PWM duty
• The PWM duty cycle is latched from CCPR1L into
 2010 Microchip Technology Inc.
cycle = 0%, the pin will not be set.)
CCPR1H.
Note:
Note:
PWM Period
Equation
PWM PERIOD
The
Section 14.1 “Timer2 Operation”) is not
used in the determination of the PWM
frequency.
T
OSC
Timer2
=
15-1.
= 1/F
(TMR2 Prescale Value)

PWM PERIOD

PR2
OSC

postscaler
+
1
 4 T


OSC
(refer

to
15.3.3
The PWM duty cycle is specified by writing a 10-bit value
to multiple registers: CCPR1L register and DC1 and B1
bits of the CCP1CON register. The CCPR1L contains
the eight MSbs and the DC1 and B1 bits of the
CCP1CON register contain the two LSbs. CCPR1L and
DC1 and B1 bits of the CCP1CON register can be
written to at any time. The duty cycle value is not latched
into CCPR1H until after the period completes (i.e., a
match between PR2 and TMR2 registers occurs). While
using the PWM, the CCPR1H register is read-only.
Equation 15-2
width.
Equation 15-3
ratio.
EQUATION 15-2:
EQUATION 15-3:
The CCPR1H register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
The 8-bit timer TMR2 register is concatenated with
either the 2-bit internal system clock (F
the prescaler, to create the 10-bit time base. The system
clock is used if the Timer2 prescaler is set to 1:1.
When the 10-bit time base matches the CCPR1H and
2-bit latch, then the CCP1 pin is cleared (refer to
Figure
Duty Cycle Ratio
Pulse Width
Note: T
15-3).
PIC16F/LF720/721
PWM DUTY CYCLE
OSC
is used to calculate the PWM duty cycle
is used to calculate the PWM pulse
=
= 1/F

T
=
CCPR1L:CCP1CON<5:4>
OSC
OSC
PULSE WIDTH
DUTY CYCLE RATIO

---------------------------------------------------------------------- -
CCPR1L:CCP1CON<5:4>

(TMR2 Prescale Value)
4 PR2

DS41430A-page 115
+
OSC
1

), or 2 bits of


