ISP1505ABS,551 NXP Semiconductors, ISP1505ABS,551 Datasheet - Page 7

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ISP1505ABS,551

Manufacturer Part Number
ISP1505ABS,551
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1505ABS,551

Number Of Transceivers
1
Esd Protection
YeskV
Operating Supply Voltage (typ)
Not RequiredV
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
Not RequiredV
Operating Supply Voltage (min)
Not RequiredV
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
Table 2.
[1]
[2]
[3]
[4]
ISP1505A_ISP1505C_3
Product data sheet
Symbol
RESET_N/PSW_N 12
REG1V8
DIR
STP
NXT
DATA7
DATA6
DATA5
DATA4
CLOCK
DATA3
V
DATA2
GND
CC(I/O)
Symbol names ending with underscore N, for example, NAME_N, indicate active LOW signals.
For details on external components required on each pin, see bill of materials and application diagrams in
I = input; O = output; I/O = digital input/output; AI = analog input; AO = analog output; AI/O = analog input/output; P = power or ground
pin.
A detailed description of these pins can be found in
[1][2]
Pin description
Pin
13
14
15
16
17
18
19
20
21
22
23
24
die
pad
…continued
Type
I/O
P
O
I
O
I/O
I/O
I/O
I/O
O
I/O
P
I/O
P
[3]
Description
This pin has two possible functions:
RESET_N (input) — Active LOW, asynchronous reset input.
3.3 V tolerant; plain input
PSW_N (output) — Active LOW external V
pump enable.
open-drain; 3.3 V tolerant
If not used, this pin must be connected to V
1.8 V regulator output
ULPI direction signal
slew-rate controlled output (1 ns)
ULPI stop signal
plain input; programmable pull up
ULPI next signal
slew-rate controlled output (1 ns)
pin 7 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
pin 6 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
pin 5 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
pin 4 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
60 MHz clock output
slew-rate controlled output (1 ns)
pin 3 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
I/O supply rail
pin 2 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
ground supply; down bonded to the exposed die pad (heat sink); to be connected to
the PCB ground
Rev. 03 — 26 August 2008
Section
[4]
7.10.
ULPI HS USB host and peripheral transceiver
ISP1505A; ISP1505C
BUS
CC(I/O)
power switch or external charge
.
Section
© NXP B.V. 2008. All rights reserved.
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