ISP1505ABS,551 NXP Semiconductors, ISP1505ABS,551 Datasheet - Page 74

• Manufacturer Part Number: ISP1505ABS,551
• Manufacturer: NXP Semiconductors

Specifications of ISP1505ABS,551

• Number Of Transceivers: 1
• Esd Protection: YeskV
• Operating Supply Voltage (typ): Not RequiredV
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): Not RequiredV
• Operating Supply Voltage (min): Not RequiredV
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
25. Figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Fig 10. Example of using the ISP1505 to transmit and
Fig 11. High-speed transmit-to-transmit packet timing. . .31
Fig 12. High-speed receive-to-transmit packet timing . . .32
Fig 13. Preamble sequence . . . . . . . . . . . . . . . . . . . . . . .33
Fig 14. Full-speed suspend and resume . . . . . . . . . . . . .34
Fig 15. High-speed suspend and resume . . . . . . . . . . . .36
Fig 16. Remote wake-up from low-power mode . . . . . . .38
Fig 17. Transmitting USB packets without
Fig 18. Example of transmit followed by receive in
Fig 19. Example of transmit followed by receive in
Fig 20. Human body ESD test model. . . . . . . . . . . . . . . .52
Fig 21. Rise time and fall time . . . . . . . . . . . . . . . . . . . . .61
Fig 22. Timing of TX_DAT and TX_SE0 to DP and DM . .61
Fig 23. Timing of TX_ENABLE to DP and DM. . . . . . . . .61
Fig 24. Timing of DP and DM to RX_RCV, RX_DP
Fig 25. ULPI interface timing . . . . . . . . . . . . . . . . . . . . . .61
Fig 26. Using the ISP1505 with a USB host controller;
Fig 27. Using the ISP1505 with a peripheral controller;
Fig 28. Package outline SOT616-3 (HVQFN24) . . . . . . .65
Fig 29. Temperature profiles for large and small
ISP1505A_ISP1505C_3
Product data sheet
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Pin configuration HVQFN24; top view . . . . . . . . . .5
Internal power-on reset timing . . . . . . . . . . . . . . .18
Power-up and reset sequence required
before the ULPI bus is ready for use . . . . . . . . . .20
Interface behavior with respect to RESET_N. . . .21
Single and back-to-back RXCMDs from the
ISP1505 to the link. . . . . . . . . . . . . . . . . . . . . . . .23
RXCMD A_VBUS_VLD indicator source . . . . . . .25
Example of register write, register read,
extended register write and extended
register read. . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
USB reset and high-speed detection
handshake (chirp) sequence . . . . . . . . . . . . . . . .29
receive USB data . . . . . . . . . . . . . . . . . . . . . . . . .30
the automatic SYNC and EOP generation. . . . . .39
6-pin serial mode . . . . . . . . . . . . . . . . . . . . . . . . .41
3-pin serial mode . . . . . . . . . . . . . . . . . . . . . . . . .41
and RX_DM . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61
external 5 V source with built-in FAULT and
external crystal. . . . . . . . . . . . . . . . . . . . . . . . . . .63
external square wave input on pin XTAL1 . . . . . .64
components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68
Rev. 03 — 26 August 2008
ULPI HS USB host and peripheral transceiver
ISP1505A; ISP1505C
© NXP B.V. 2008. All rights reserved.
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