TMC22053KHC Fairchild Semiconductor, TMC22053KHC Datasheet - Page 26
TMC22053KHC
Manufacturer Part Number
TMC22053KHC
Description
Manufacturer
Fairchild Semiconductor
Datasheet
1.TMC22053KHC.pdf
(84 pages)
Specifications of TMC22053KHC
Screening Level
Commercial
Package Type
MQFP
Pin Count
100
Lead Free Status / RoHS Status
Compliant
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TMC22x5y
Control Register Definitions
Buffered register set 0 (17)
Buffered register set 0 (18)
Buffered register set 0 (19)
Buffered register set 0 (1A)
Buffered register set 0 (1B)
26
Reg
17
Reg
18
Reg
19
Reg
1A
Reg
1B
1B
1B
1B
SG0
YG0
UG0
VG0
YG0
7
7
7
7
7
7
7
7
7
9
Bit
7-0
Bit
7-0
Bit
7-0
Bit
7-0
Bit
7-6
5-3
2
1-0
SG0
YG0
UG0
VG0
YG0
6
6
6
6
6
Reserved
Name
SG0
Name
YG0
Name
UG0
Name
VG0
Name
YG0
UG0
VG0
6
6
6
8
6
7-0
7-0
7-0
7-0
9-8
10-8
9-8
Active when BUFFER pin set LOW.
Active when BUFFER pin set LOW.
Active when BUFFER pin set LOW.
Active when BUFFER pin set LOW.
Active when BUFFER pin set LOW.
UG0
UG0
SG0
YG0
VG0
5
5
5
5
5
10
5
5
5
5
Description
Msync gain, 8 lsbs. Bottom 8 bits of mixed sync scalar
lsb = 1/256
Description
Y gain, 8 lsbs. Bottom 8 bits of the luma gain
lsb = 1/256
Description
U gain, 8 lsbs. Bottom 8 bits of the U gain
lsb = 1/256
Description
V gain, 8 lsbs. Bottom 8 bits of the V gain
lsb = 1/256
Description
Y gain, 2 msb. Top 2 bits of the Y gain. msb = 2
U gain, 3 msbs. Top 3 bits of the U gain. msb = 4
Reserved, set to zero.
V gain, 2 msbs. Top 2 bits of the V gain. msb = 2
(continued)
UG0
UG0
SG0
YG0
VG0
4
4
4
4
4
4
4
4
4
9
UG0
UG0
SG0
YG0
VG0
3
3
3
3
3
3
3
3
3
8
Reserved
SG0
YG0
UG0
VG0
2
2
2
2
2
2
2
2
2
SG0
YG0
UG0
VG0
VG0
PRODUCT SPECIFICATION
1
1
1
1
1
1
1
1
1
9
SG0
YG0
UG0
VG0
VG0
0
0
0
0
0
0
0
0
0
8
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