M25PX32-VMF6E NUMONYX, M25PX32-VMF6E Datasheet - Page 16

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M25PX32-VMF6E

Manufacturer Part Number
M25PX32-VMF6E
Description
Manufacturer
NUMONYX
Datasheet

Specifications of M25PX32-VMF6E

Cell Type
NOR
Density
32Mb
Access Time (max)
8ns
Interface Type
Serial (SPI)
Boot Type
Not Required
Address Bus
1b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
SOIC W
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
4M
Supply Current
12mA
Mounting
Surface Mount
Pin Count
16
Lead Free Status / RoHS Status
Compliant

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4.7.2
16/68
Specific hardware and software protection
There are two software protected modes, SPM1 and SPM2, that can be combined to protect
the memory array as required. The SPM2 can be locked by hardware with the help of the W
input pin.
SPM1 and SPM2
Table 2.
Down bit
Lock
The first software protected mode (SPM1) is managed by specific Lock Registers
assigned to each 64 Kbyte sector.
The Lock Registers can be read and written using the Read Lock Register (RDLR) and
Write to Lock Register (WRLR) instructions.
In each Lock Register two bits control the protection of each sector: the Write Lock bit
and the Lock Down bit.
The definition of the Lock Register bits is given in
Sector Lock
the second software protected mode (SPM2) uses the Block Protect bits (see
Section 6.4.3: BP2, BP1, BP0
allow part of the memory to be configured as read-only.
0
0
1
1
Register
Write Lock bit:
The Write Lock bit determines whether the contents of the sector can be modified
(using the Write, Program or Erase instructions). When the Write Lock bit is set to
‘1’, the sector is write protected – any operations that attempt to change the data
in the sector will fail. When the Write Lock bit is reset to ‘0’, the sector is not write
protected by the Lock Register, and may be modified.
Lock Down bit:
The Lock Down bit provides a mechanism for protecting software data from simple
hacking and malicious attack. When the Lock Down bit is set, ‘1’, further
modification to the Write Lock and Lock Down bits cannot be performed. A power-
up, is required before changes to these bits can be made. When the Lock Down
bit is reset, ‘0’, the Write Lock and Lock Down bits can be changed.
Lock bit
Software protection truth table (Sectors 0 to 63, 64 Kbyte granularity)
Write
0
1
0
1
Sector unprotected from Program/Erase/Write operations, protection status
reversible
Sector protected from Program/Erase/Write operations, protection status
reversible
Sector unprotected from Program/Erase/Write operations,
Sector protection status cannot be changed except by a power-up.
Sector protected from Program/Erase/Write operations,
Sector protection status cannot be changed except by a Power-up.
bits) and the Top/Bottom bit (see
Protection status
Table 9: Lock Register
Section 6.4.4: TB
out.
bit) to

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