M25PX32-VMF6E NUMONYX, M25PX32-VMF6E Datasheet - Page 33

• Manufacturer Part Number: M25PX32-VMF6E
• Manufacturer: NUMONYX

Specifications of M25PX32-VMF6E

• Cell Type: NOR
• Density: 32Mb
• Access Time (max): 8ns
• Interface Type: Serial (SPI)
• Boot Type: Not Required
• Address Bus: 1b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: SOIC W
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 4M
• Supply Current: 12mA
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Compliant

6.6
Read Data Bytes (READ)
The device is first selected by driving Chip Select (S) Low. The instruction code for the Read
Data Bytes (READ) instruction is followed by a 3-byte address (A23-A0), each bit being
latched-in during the rising edge of Serial Clock (C). Then the memory contents, at that
address, is shifted out on Serial Data output (DQ1), each bit being shifted out, at a
maximum frequency f
The instruction sequence is shown in
The first byte addressed can be at any location. The address is automatically incremented
to the next higher address after each byte of data is shifted out. The whole memory can,
therefore, be read with a single Read Data Bytes (READ) instruction. When the highest
address is reached, the address counter rolls over to 000000h, allowing the read sequence
to be continued indefinitely.
The Read Data Bytes (READ) instruction is terminated by driving Chip Select (S) High. Chip
Select (S) can be driven High at any time during data output. Any Read Data Bytes (READ)
instruction, while an Erase, Program or Write cycle is in progress, is rejected without having
any effects on the cycle that is in progress.
Figure 14. Read Data Bytes (READ) instruction sequence and data-out sequence
1. Address bits A23 to A22 are Don’t care.
DQ0
DQ1
S
C
0
1
High Impedance
2
Instruction
3
R
, during the falling edge of Serial Clock (C).
4
5
6
7
MSB
23
8
22 21
Figure
9 10
24-bit address
14.
3
28 29 30 31 32 33 34 35
2
1
0
MSB
7
6
5
Data Out 1
4
3
36 37 38
2
1
39
0
Data Out 2
7
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