SAF1562HL/N2-T NXP Semiconductors, SAF1562HL/N2-T Datasheet - Page 110

• Manufacturer Part Number: SAF1562HL/N2-T
• Description: DC/DC Switching Controllers CONNECTIVITY CHIP
• Manufacturer: NXP Semiconductors

Specifications of SAF1562HL/N2-T

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
20. Abbreviations
SAF1562
Product data sheet
19.28.1 Problem description
19.28.2 Implication
19.28.3 Workaround
19.29.1 Problem description
19.29.2 Implication
19.29.3 Workaround
19.28 Erratum 28
19.29 Erratum 29
When using certain EEPROM ICs for programming, data downloading could fail if the data
line (SDA) is stuck at LOW after PCI reset.
If system reset occurs during the scanning process of the I
get stuck at LOW. When this happens, the SAF1562 cannot download data from the
EEPROM because it cannot detect the slave address or the START condition of the
I
This issue occurs only at certain EEPROMs that need nine clocks to detect the START
condition of the I
The implication is low because this problem is applicable only to certain EEPROMs that
need nine clocks to detect the START condition of the I
Avoid using EEPROMs that require nine clocks to detect the START condition of the
I
Although data parity error occurs, the data can still be written into the PCI configuration
space or SAF1562 host registers.
During PCI configuration write or register write, the data can still be written into the PCI
configuration space or SAF1562 host registers although data parity error occurs. This data
should be discarded because the host controller might process the corrupted data.
The implication is low. Parity error will not occur during normal operation. This can happen
only during debugging.
During debugging, if pin PERR# is asserted, ignore the data written to the PCI
configuration space or SAF1562 host registers.
Table 127. Abbreviations
Acronym
BIOS
CC
CMOS
CPU
2
2
C-bus. As a result, the SAF1562 will assume that there is no EEPROM attached.
C-bus.
All information provided in this document is subject to legal disclaimers.
2
C-bus.
Description
Built-In Operating System
Condition Code
Complementary Metal-Oxide Semiconductor
Central Processing Unit
Rev. 2 — 24 November 2010
Hi-Speed Universal Serial Bus PCI Host Controller
2
C-bus.
2
C-bus device, the SDA might
SAF1562
© NXP B.V. 2010. All rights reserved.
110 of 121