SAF1562HL/N2-T NXP Semiconductors, SAF1562HL/N2-T Datasheet - Page 55

• Manufacturer Part Number: SAF1562HL/N2-T
• Description: DC/DC Switching Controllers CONNECTIVITY CHIP
• Manufacturer: NXP Semiconductors

Specifications of SAF1562HL/N2-T

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
SAF1562
Product data sheet
11.1.19 HcRhDescriptorA register
This register is the first of two registers describing the characteristics of the Root Hub.
Reset values are implementation-specific.
Table 78
Table 78.
Address: Content of the base address register + 48h
[1]
Table 79.
Address: Content of the base address register + 48h
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31 to 24 POTPGT
23 to 13 reserved
12
11
The reserved bits should always be written with the reset value.
contains the bit allocation of the HcRhDescriptorA register.
Symbol
[7:0]
NOCP
OCPM
HcRhDescriptorA - Host Controller Root Hub Descriptor A register bit allocation
HcRhDescriptorA - Host Controller Root Hub Descriptor A register bit
description
R/W
R/W
R/W
31
23
15
R
1
0
0
7
0
All information provided in this document is subject to legal disclaimers.
reserved
Description
Power On To Power Good Time: This byte specifies the duration the HCD
must wait before accessing a powered-on port of the Root Hub. It is
implementation-specific. The unit of time is 2 ms. The duration is calculated
as POTPGT × 2 ms.
-
No Over Current Protection: This bit describes how the overcurrent status
for Root Hub ports are reported. When this bit is cleared, the OCPM bit
specifies global or per-port reporting.
0 — Overcurrent status is collectively reported for all downstream ports
1 — No overcurrent protection supported
Over Current Protection Mode: This bit describes how the overcurrent
status for Root Hub ports are reported. At reset, this fields reflects the same
mode as Power Switching Mode. This field is valid only if the NOCP bit is
cleared.
0 — Overcurrent status is collectively reported for all downstream ports
1 — Overcurrent status is reported on a per-port basis
Rev. 2 — 24 November 2010
R/W
R/W
R/W
30
22
14
R
1
0
0
6
0
[1]
R/W
R/W
R/W
29
21
13
R
1
0
0
5
0
Hi-Speed Universal Serial Bus PCI Host Controller
NOCP
R/W
R/W
R/W
28
POTPGT[7:0]
20
12
R
1
0
0
4
0
reserved
NDP[7:0]
OCPM
R/W
R/W
R/W
[1]
27
19
11
R
1
0
1
3
0
R/W
R/W
DT
26
18
10
R
R
1
0
0
2
0
SAF1562
© NXP B.V. 2010. All rights reserved.
NPS
R/W
R/W
R/W
25
17
R
1
0
9
0
1
0
55 of 121
PSM
R/W
R/W
R/W
24
16
R
1
0
8
1
0
1