JGE7501MC S L8AL Intel, JGE7501MC S L8AL Datasheet - Page 23

• Manufacturer Part Number: JGE7501MC S L8AL
• Manufacturer: Intel

Specifications of JGE7501MC S L8AL

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

2.3
Intel
®
Table 2-3. DDR Channel_B Channel Signals
E7501 Chipset MCH Datasheet
DDR Channel B Signals
NOTE: Channel B is not active in single-channel mode.
DDRVREF_B[3:0]
CMDCLK_B[3:0]#
CMDCLK_B[3:0],
DDRCOMP_B
Signal Name
DQS_B[17:0]
DDRCVO_B
DQ_B[63:0]
MA_B[12:0]
CS_B[7:0]#
CB_B[7:0]
RCVEN_B
BA_B[1:0]
RAS_B#
CAS_B#
WE_B#
CKE_B
SSTL-2
SSTL-2
SSTL-2
SSTL-2
SSTL-2
SSTL-2
SSTL-2
SSTL-2
SSTL-2
SSTL-2
SSTL-2
SSTL-2
Analog
Analog
Analog
Type
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
I
I
I
DDR Channel B Check Bits: These check bits are required to provide ECC
support.
DDR Channel B Data Bus: These signals are the DDR data bus that
provides the data for the DRAM devices.
DDR Channel B Data Strobes: These signals are the DDR data strobes.
Each data strobe is used to strobe a set of data signals defined in
Section
DDR Channel B Command CLOCK: These signals are the DDR command
clocks used by the DDR DRAMs to latch MA_B[12:0], BA_B[1:0], RAS_B#,
CAS_B#, WE_B#, CKE_B, and CS_B[7:0]# signals.
DDR Channel B Memory Address: MA_B[12:0] are the DDR memory
address signals. These signals are outputs of the MCH.
DDR Channel B Bank Address: BA_B[1:0] are the DDR bank address
signals. These signals are outputs of the MCH and select which bank within
a row is selected.
DDR Channel B Row Address Strobe: RAS_B# is used to indicate a valid
row address and open a row.
DDR Channel B Column Address Strobe: CAS_B# is used to indicate a
valid column address and initiate a transaction.
DDR Channel B Write Enable: WE_B# is used to indicate a write cycle.
DDR Channel B Chipselect: The chip selects are used to indicate for which
ROW cycles are targeted.
DDR Channel B Clock Enable: The DDR Channel B clock enable.
Receive Enable Output: RCVEN_B is used for DRAM timing.
Compensation for DDR B: This signal is used to calibrate the buffers for
DDR channel B.
Compensation for DDR B: This signal is used as a reference voltage in the
calibration of channel B DDR buffers.
DDR Channel B Voltage Reference: The DDR voltage reference.
5.5.4.
Description
Signal Description
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