MK2069-03GI IDT, Integrated Device Technology Inc, MK2069-03GI Datasheet - Page 18

• Manufacturer Part Number: MK2069-03GI
• Description: IC VCXO CLK TRANSLATOR 56-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Synchronizerr

Specifications of MK2069-03GI

• Pll: Yes
• Input: LVCMOS
• Output: LVCMOS
• Number Of Circuits: 1
• Ratio - Input:output: 1:3
• Differential - Input:output: No/No
• Frequency - Max: 160MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: 160MHz
• Number Of Elements: 2
• Supply Current: 30mA
• Pll Input Freq (min): 1KHz
• Pll Input Freq (max): 27MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSSOP
• Output Frequency Range: 2.5 to 160MHz
• Operating Supply Voltage (min): 3.15V
• Operating Supply Voltage (max): 3.45V
• Operating Temperature Classification: Industrial
• Pin Count: 56
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

IDT™ / ICS™ VCXO-BASED CLOCK TRANSLATOR WITH HIGH MULTIPLICATION 18
MK2069-03
VCXO-BASED CLOCK TRANSLATOR WITH HIGH MULTIPLICATION
Note 1: This is the recommended crystal operating range. A crystal as low as 8 MHz can be used, although this may
Note 2: The VCXO crystal will be pulled to its minimum frequency when there is no input clock (CLR = 1) due to the
Note 3: The minimum practical phase detector frequency is is assumed to be 1 kHz. Through proper loop filter
Note 4: The output of RCLK is a positive pulse with a duration equal to VCLK high time, or half the VCLK period.
Note 5: Referenced to ICLK, the skews of VCLK, RCLK and TCLK increase together when leakage is present in the
Output Rise Time, TCLK
Output Fall Time, TCLK
Skew, ICLK to VCLK (Note 5)
Skew, ICLK to RCLK (Note 5)
Skew, ICLK to TCLK (Note 5)
Nominal Output Impedance
result in increased output phase noise.
attempt of the PLL to lock to 0 Hz.
design lower input frequencies may be possible. Input frequencies as low as 400Hz have been
implemented.
external VCXO PLL loop filter.
Parameter
Symbol
Z
t
t
t
OUT
t
t
OR
OF
VT
IV
IV
0.8 to 2.0V, C
2.0 to 0.8V, C
Rising edges, C
Rising edges, C
Rising edges, C
Conditions
L
L
=15pF
=15pF
L
L
L
=15pF
=15pF
=15pF
Min.
+5
-5
-5
Typ.
0.75
0.75
2.5
1.5
10
20
VCXO AND SYNTHESIZER
MK2069-03
Max. Units
+10
+20
+10
1
1
ns
ns
ns
ns
ns
REV J 030906