X9251US24IZ-2.7 Intersil, X9251US24IZ-2.7 Datasheet - Page 7

• Manufacturer Part Number: X9251US24IZ-2.7
• Description: IC XDCP QUAD 256TAP 50K 24-SOIC
• Manufacturer: Intersil
• Series: XDCP™r

Specifications of X9251US24IZ-2.7

• Taps: 256
• Resistance (ohms): 50K
• Number Of Circuits: 4
• Temperature Coefficient: 300 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Resistance In Ohms: 50K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NOTE: 1/0 = data is one or zero
Instructions
Four of the nine instructions are three bytes in length. These
instructions are:
• Read Wiper Counter Register – read the current wiper
• Write Wiper Counter Register – change current wiper
• Read Data Register – read the contents of the selected
• Write Data Register – write a new value to the selected
• Read Status – this command returns the contents of the
The basic sequence of the three byte instructions is
illustrated in Figure 3. These three-byte instructions
exchange data between the WCR and one of the Data
Registers. A transfer from a Data Register to a WCR is
essentially a write to a static RAM, with the static RAM
controlling the wiper position. The response of the wiper to
this action is delayed by t
(current wiper position), to a Data Register is a write to non-
volatile memory and takes a minimum of t
The transfer can occur between one of the four
potentiometer’s WCR, and one of its associated registers,
Read Wiper Counter Register
Write Wiper Counter Register
Read Data Register
Write Data Register
XFR Data Register to
Wiper Counter Register
XFR Wiper Counter
Register to Data Register
Global XFR Data Registers to
Wiper Counter Registers
Global XFR Wiper Counter
Registers to Data Register
Increment/Decrement
Wiper Counter Register
position of the selected potentiometer,
position of the selected potentiometer,
Data Register,
Data Register,
WIP bit which indicates if the internal write cycle is in
progress.
INSTRUCTION
WRL
. A transfer from the WCR
7
I3
1
1
1
1
1
1
0
1
0
I2
0
0
0
1
1
1
0
0
0
WR
to complete.
I1
0
1
1
0
0
1
0
0
1
INSTRUCTION SET
TABLE 5. INSTRUCTION SET
I0
1
0
1
0
1
0
1
0
0
RB
1/0
1/0
1/0
1/0
1/0
1/0
0
0
0
X9251
RA
1/0
1/0
1/0
1/0
1/0
1/0
0
0
0
DRs; or it may occur globally, where the transfer occurs
between all potentiometers and one associated register. The
Read Status Register instruction is the only unique format
(See Figure 5).
Four instructions require a two-byte sequence to complete.
These instructions transfer data between the host and the
X9251; either between the host and one of the data registers
or directly between the host and the Wiper Counter Register.
These instructions are:
• XFR Data Register to Wiper Counter Register – This
• XFR Wiper Counter Register to Data Register – This
• Global XFR Data Register to Wiper Counter
• Global XFR Wiper Counter Register to Data
1/0
1/0
1/0
1/0
1/0
1/0
1/0
P1
transfers the contents of one specified Data Register to
the associated Wiper Counter Register.
transfers the contents of the specified Wiper Counter
Register to the specified associated Data Register.
Register – This transfers the contents of all specified Data
Registers to the associated Wiper Counter Registers.
Register – This transfers the contents of all Wiper
Counter Registers to the specified associated Data
Registers.
0
0
1/0
1/0
1/0
1/0
1/0
1/0
1/0
P0
0
0
Read the contents of the Wiper Counter Register
pointed to by P1 - P0
Write new value to the Wiper Counter
Register pointed to by P1 - P0
Read the contents of the Data Register pointed to
by P1 - P0 and RB - RA
Write new value to the Data Register
pointed to by P1 - P0 and RB - RA
Transfer the contents of the Data Register pointed to
by P1 - P0 and RB - RA to its
associated Wiper Counter Register
Transfer the contents of the Wiper Counter Register
pointed to by P1 - P0 to the Data Register pointed
to by RB - RA
Transfer the contents of the Data Registers pointed
to by RB - RA of all four pots to their respective
Wiper Counter Registers
Transfer the contents of both Wiper Counter
Registers to their respective data Registers pointed
to by RB - RA of all four pots
Enable Increment/decrement of the Control Latch
pointed to by P1 - P0
OPERATION
April 13, 2007
FN8166.5