MPC852TCVR100A Freescale Semiconductor, MPC852TCVR100A Datasheet - Page 19
MPC852TCVR100A
Manufacturer Part Number
MPC852TCVR100A
Description
IC MPU POWERQUICC 100MHZ 256PBGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC852TVR50A.pdf
(80 pages)
Specifications of MPC852TCVR100A
Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
100MHz
Voltage
1.8V
Mounting Type
Surface Mount
Package / Case
256-PBGA
Processor Series
MPC8xx
Core
MPC8xx
Data Bus Width
32 bit
Development Tools By Supplier
MPC852TADS-KIT
Maximum Clock Frequency
100 MHz
Operating Supply Voltage
0 V to 3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
8 KB
Minimum Operating Temperature
- 40 C
Program Memory Size
4 KB
Program Memory Type
EPROM/Flash
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC852TCVR100A
Manufacturer:
FREESCAL
Quantity:
300
Company:
Part Number:
MPC852TCVR100A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
B30b
B30d
B31a
B31b
B31d
Num
B30c
B31c
B31
B32
WE(0:3)/BS_B[0:3] negated to A(0:31)
Invalid GPCM BADDR(28:30) invalid
GPCM write access, TRLX = 1, CSNT = 1.
CS negated to A(0:31) Invalid GPCM write
access TRLX = 1, CSNT = 1, ACS = 10, or
ACS == 11 EBDF = 0
(MIN = 1.50 × B1 – 2.00)
WE(0:3)/BS_B[0:3] negated to A(0:31),
BADDR(28:30) invalid GPCM write
access, TRLX = 0, CSNT = 1. CS negated
to A(0:31) invalid GPCM write access,
TRLX = 0, CSNT = 1 ACS = 10,
ACS == 11, EBDF = 1
(MIN = 0.375 × B1 – 3.00)
WE(0:3)/BS_B[0:3] negated to A(0:31),
BADDR(28:30) invalid GPCM write access
TRLX = 1, CSNT =1, CS negated to
A(0:31) invalid GPCM write access
TRLX = 1, CSNT = 1, ACS = 10 or 11,
EBDF = 1
CLKOUT falling edge to CS valid - as
requested by control bit CST4 in the
corresponding word in the UPM
(MAX = 0.00 × B1 + 6.00)
CLKOUT falling edge to CS valid - as
requested by control bit CST1 in the
corresponding word in the UPM
(MAX = 0.25 × B1 + 6.80)
CLKOUT rising edge to CS valid - as
requested by control bit CST2 in the
corresponding word in the UPM
(MAX = 0.00 × B1 + 8.00)
CLKOUT rising edge to CS valid- as
requested by control bit CST3 in the
corresponding word in the UPM
(MAX = 0.25 × B1 + 6.30)
CLKOUT falling edge to CS valid, as
requested by control bit CST1 in the
corresponding word in the UPM EBDF = 1
(MAX = 0.375 × B1 + 6.6)
CLKOUT falling edge to BS valid- as
requested by control bit BST4 in the
corresponding word in the UPM
(MAX = 0.00 × B1 + 6.00)
Characteristic
MPC852T PowerQUICC™ Hardware Specifications, Rev. 4
Table 9. Bus Operation Timings (continued)
43.50
38.67
13.30
8.40
1.50
7.60
1.50
7.60
1.50
Min
33 MHz
14.30
13.80
18.00
Max
6.00
8.00
6.00
—
—
—
35.50
31.38
11.30
6.40
1.50
6.30
1.50
6.30
1.50
Min
40 MHz
13.00
12.50
16.00
Max
6.00
8.00
6.00
—
—
—
28.00
24.50
4.50
1.50
5.00
1.50
5.00
9.40
1.50
Min
50 MHz
11.80
11.30
14.10
Max
6.00
8.00
6.00
—
—
—
20.70
17.83
2.70
3.80
3.80
7.60
1.50
1.50
1.50
Min
66 MHz
Bus Signal Timing
10.50
10.00
12.30
Max
6.00
8.00
6.00
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
19