MC68MH360AI33L Freescale Semiconductor, MC68MH360AI33L Datasheet - Page 299

• Manufacturer Part Number: MC68MH360AI33L
• Description: IC MPU QUICC 33MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360AI33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 33MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

slower than the QUICC's internal bus masters. The external master may be either synchro-
nous or asynchronous with respect to the QUICC system clock, with the exception of the
MC68EC040, which must always be synchronous with respect to the QUICC system clock.
Thus, if a 25-MHz QUICC is used, a 25-MHz MC68EC040 should also be used.
If an external MC68040 master does not use the memory controller at all, then the QUICC
can operate asynchronously to the MC68040, but the QUICC MC68040 companion mode
signals cannot be used, and the MC68040 bus signals must be converted to MC68030-type
bus signals before the MC68040 accesses the QUICC's internal RAM and peripherals.
Figure 6-12. Larger QUICC System Configuration
MC68360
QUICC
PRTY3–PRTY0
CAS3–CAS0
WE3–WE0
ADDRESS
Freescale Semiconductor, Inc.
For More Information On This Product,
DATA
RAS2
RAS1
WE0
CS0
CS7
OE
R/W
MC68360 USER’S MANUAL
Go to: www.freescale.com
BUFFER
CE (ENABLE)
OE (OUTPUT ENABLE)
WE (WRITE)
DATA
ADDRESS
8-, 16-, OR 32-BIT SRAM
E (ENABLE)
G (OUTPUT ENABLE)
W (WRITE)
DATA
ADDRESS
(FLASH OR REGULAR)
RAS
CAS3–CAS0
W (WRITE)
DATA
ADDRESS
PARITY
System Integration Module (SIM60)
8-BIT BOOT
EPROM
RAS
(OPTIONAL PARITY)
TWO-DRAM SIMMs
16- OR 32-BIT