MC68MH360AI33L Freescale Semiconductor, MC68MH360AI33L Datasheet - Page 412

• Manufacturer Part Number: MC68MH360AI33L
• Description: IC MPU QUICC 33MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360AI33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 33MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Serial Interface with Time Slot Assigner
CROTa—Current Route of TDMa Transmitter
CRORb—Current Route of TDMb Receiver
CROTb—Current Route of TDMb Transmitter
Bits 3–0—Reserved
7.8.5.6 SI RAM POINTERS (SIRP). This 32-bit, read-only register indicates to the user
which RAM entry is currently being serviced. This gives a real-time status of where the SI
current is inside the TDM frame.
Although SIRP does not need to be accessed by most users, it does provide information that
may be helpful for debugging and synchronization of some system activity to the activity on
the TDMs. Reading SISTR should be sufficient for most applications.
The user can determine which RAM entry in the SI RAM is currently in progress, but cannot
determine the status within that entry. For instance, if the RAM entry is programmed to
select four contiguous time slots from the TDM and the SIRP indicates the entry is currently
active, the user does not know which of the four time slots is currently in progress. The SIRP
will, however, change its status immediately when the next SI RAM entry begins to be pro-
cessed.
The value of this register is changed upon transitions of the serial clocks. Before acting on
the information in this register, the user should perform two reads and verify that the two
reads returned the same value.
7-88
This bit is valid only in the RAM division mode (RDM bits in the SIGMR equal 11).
This bit is valid only in the RAM division mode (RDM bits in the SIGMR equal 11).
0 = The current-route transmitter RAM is in address:
1 = The current-route transmitter RAM is in address:
0 = The current-route receiver RAM is in address 64–95.
1 = The current-route receiver RAM is in address 96–127.
0 = The current-route transmitter RAM is in address 192–223.
1 = The current-route transmitter RAM is in address 224–255.
128–191 when the SI supports one TDM (RDM = 01).
128–159 when the SI supports two TDMs (RDM = 11).
192–255 when the SI supports one TDM (RDM = 01).
160–191 when the SI supports two TDMs (RDM = 11).
The user may also connect one of the four strobes externally to
an interrupt pin to generate an interrupt on a particular SI RAM
entry starting or ending execution by the TSA.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
NOTE