MC68EC060RC66 Freescale Semiconductor, MC68EC060RC66 Datasheet - Page 335

• Manufacturer Part Number: MC68EC060RC66
• Description: IC MPU 32BIT 66MHZ 206-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC060RC66

• Processor Type: M680x0 32-Bit
• Speed: 66MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 206-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Operating Temp Range: 0C to 110C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 206
• Package Type: PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Applications Information
11.2.3 Bus Arbitration
The MC68060 does not drive the bus in implicit bus ownership cases where it has not yet
requested the bus. Although this feature is not known to be necessary for MC68040-based
designs, this is a difference. This MC68060 action does not pose any known problems to
existing MC68040 designs.
The BGR signal may be pulled low or grounded to cause the MC68060 to relinquish the bus
on locked sequences to behave like the MC68040. To use the BB protocol, BTT should be
pulled up through a resistor (approximate value of 5 K ) to V
. Since the MC68060 drives
dd
BTT low at times, no other signals should be connected to this pullup resistor.
See 11.2.2 Output Hold Time Differences, as bus arbitration may be an issue for output
hold time requirements.
11.2.4 Snooping
The MC68060 does not support snoop intervention during bus cycles as the MC68040 does.
The MC68060 implements only the snoop invalidate protocol. The MC68060 only has one
SNOOP signal instead of the two-bit encoding of the SCx signals on the MC68040. Also, the
MC68060 does not implement the MI pin; the MI signal must be pulled up if it is used by the
system.
If an MC68040 system only utilizes invalidate line snoop functionality, the SCx signal control
could be mapped to assert SNOOP to the MC68060. Other MC68040 snoop implementa-
tions must also implement software changes to flush cache or address map to write-through
mode shared system memory areas.
11.2.5 Special Modes
TheMC68040 and MC68060 IPLx signals have different functionality when coming out of
reset. On the MC68040, the IPLx signals select the buffer size. The MC68060 has only one
buffer size, and therefore the MC68060 encodes different functionality when it samples the
IPLx signals when coming out of reset.
The MC68060 has new special modes that are selectable via the IPLx signals during reset.
These MC68060 special modes are: acknowledge termination ignore state capability,
acknowledge termination mode, and extra write hold mode. To prevent these modes from
being enabled, the IPLx signals must be negated (pulled high) during reset.
The MC68060 does not implement the DLE functionality of the MC68040. Applications that
use the DLE mode are not upgradable without using external logic.The MC68060 does not
implement the muxed bus functionality of the MC68040. Applications that use muxed bus
mode are not upgradable without using external logic.
MOTOROLA
M68060 USER’S MANUAL
11-13