ADV7181BCP Analog Devices Inc, ADV7181BCP Datasheet - Page 17

IC VIDEO DECODER NTSC 64-LFCSP

ADV7181BCP

Manufacturer Part Number
ADV7181BCP
Description
IC VIDEO DECODER NTSC 64-LFCSP
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheets

Specifications of ADV7181BCP

Applications
Recorders, Set-Top Boxes
Voltage - Supply, Analog
3.15 V ~ 3.45 V
Voltage - Supply, Digital
1.65 V ~ 2 V
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Adc/dac Resolution
9b
Screening Level
Industrial
Package Type
LFCSP EP
Pin Count
64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
EVAL-ADV7181BEB - BOARD EVALUATION FOR ADV7181
Lead Free Status / RoHS Status
Compliant, Contains lead / RoHS non-compliant
Enable Subcarrier Frequency Lock Pin
EN_SFL_PIN Address 0x04[1]
The EN_SFL_PIN bit enables the output of subcarrier lock
information (also known as GenLock) from the ADV7181B
core to an encoder in a decoder-encoder back-to-back
arrangement.
When EN_SFL_PIN is 0 (default), the subcarrier frequency lock
output is disabled.
When EN_SFL_PIN is 1, the subcarrier frequency lock
information is presented on the SFL pin.
Rev. B | Page 17 of 100
Polarity LLC Pin
PCLK Address 0x37[0]
The polarity of the clock that leaves the ADV7181B via the LLC
pin can be inverted using the PCLK bit.
Changing the polarity of the LLC clock output can be necessary
to meet the setup-and-hold time expectations of follow-on
chips.
When PCLK is 0, the LLC output polarity is inverted.
When PCLK is 1 (default), the LLC output polarity is normal
(as per the timing diagrams).
ADV7181B

Related parts for ADV7181BCP