ADV7181BCP Analog Devices Inc, ADV7181BCP Datasheet - Page 68

• Manufacturer Part Number: ADV7181BCP
• Description: IC VIDEO DECODER NTSC 64-LFCSP
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7181BCP

• Applications: Recorders, Set-Top Boxes
• Voltage - Supply, Analog: 3.15 V ~ 3.45 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Adc/dac Resolution: 9b
• Screening Level: Industrial
• Package Type: LFCSP EP
• Pin Count: 64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: EVAL-ADV7181BEB - BOARD EVALUATION FOR ADV7181
• Lead Free Status / RoHS Status: Compliant, Contains lead / RoHS non-compliant

ADV7181B
Table 84. Interrupt Register Map Details
Subaddress
0x40
0x41
0x42
0x43
Register
Interrupt
Config 1
Register
Access
Page 2
Reserved
Interrupt
Status 1
Read Only
Register
Access
Page 2
Interrupt
Clear 1
Write Only
Register
Access
Page 2
Bit Description
INTRQ_OP_SEL[1:0].
Interrupt Drive Level Select.
MPU_STIM_INTRQ[1:0].
Manual Interrupt Set Mode.
Reserved.
MV_INTRQ_SEL[1:0].
Macrovision Interrupt
Select.
INTRQ_DUR_SEL[1:0].
Interrupt Duration Select.
SD_LOCK_Q.
SD_UNLOCK_Q.
Reserved.
Reserved.
Reserved.
SD_FR_CHNG_Q.
MV_PS_CS_Q.
Reserved.
SD_LOCK_CLR.
SD_UNLOCK_CLR.
Reserved.
Reserved.
Reserved.
SD_FR_CHNG_CLR.
MV_PS_CS_CLR.
Reserved.
7
0
0
1
1
x
x
x
Rev. B | Page 68 of 100
6
0
1
0
1
0
1
0
1
x
5
0
0
1
1
x
0
1
0
1
4
0
1
0
1
x
x
0
Bit
3
x
x
x
0
2
0
1
x
x
0
1
0
0
1
1
x
0
1
0
1
0
0
1
0
1
x
0
1
0
1
Comments
Open drain
Drive low when active
Drive high when active
Reserved
Manual interrupt mode disabled
Manual interrupt mode enabled
Not used
Reserved
Pseudo sync only
Color stripe only
Pseudo sync or color stripe
3 Xtal periods
15 Xtal periods
63 Xtal periods
Active until cleared
No change
SD input has caused the decoder
No change
SD input has caused the
No change
Denotes a change in the free-
No change
Pseudo sync/color striping
MV_INTRQ_SEL[1:0],
Macrovision Interrupt
Selection Bits, Address 0x40
(Interrupt Space)[5:4]
selection
Do not clear
Clears SD_LOCK_Q bit
Do not clear
Clears SD_UNLOCK_Q bit
Not used
Not used
Not used
Do not clear
Clears SD_FR_CHNG_Q bit
Do not clear
Clears MV_PS_CS_Q bit
Not used
to go from an unlocked state to
a locked state
decoder to go from a locked
state to an unlocked state
run status
detected; see
for
These bits
can be
cleared or
masked in
Registers
0x43 and
0x44,
respectively.
Notes