ADV7181BCP Analog Devices Inc, ADV7181BCP Datasheet - Page 21

IC VIDEO DECODER NTSC 64-LFCSP

ADV7181BCP

Manufacturer Part Number
ADV7181BCP
Description
IC VIDEO DECODER NTSC 64-LFCSP
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheets

Specifications of ADV7181BCP

Applications
Recorders, Set-Top Boxes
Voltage - Supply, Analog
3.15 V ~ 3.45 V
Voltage - Supply, Digital
1.65 V ~ 2 V
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Adc/dac Resolution
9b
Screening Level
Industrial
Package Type
LFCSP EP
Pin Count
64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
EVAL-ADV7181BEB - BOARD EVALUATION FOR ADV7181
Lead Free Status / RoHS Status
Compliant, Contains lead / RoHS non-compliant
AD_SECAM_EN Enable Autodetection of SECAM,
Address 0x07 [6]
Setting AD_SECAM_EN to 0 (default) disables the
autodetection of SECAM.
Setting AD_SECAM_EN to 1 enables the detection.
AD_N443_EN Enable Autodetection of NTSC 443,
Address 0x07 [5]
Setting AD_N443_EN to 0 disables the autodetection of NTSC
style systems with a 4.43 MHz color subcarrier.
Setting AD_N443_EN to 1 (default) enables the detection.
AD_P60_EN Enable Autodetection of PAL60,
Address 0x07[4]
Setting AD_P60_EN to 0 disables the autodetection of PAL
systems with a 60 Hz field rate.
Setting AD_P60_EN to 1 (default) enables the detection.
AD_PALN_EN Enable Autodetection of PAL N,
Address 0x07[3]
Setting AD_PALN_EN to 0 (default) disables the detection of
the PAL N standard.
Setting AD_PALN_EN to 1 enables the detection.
AD_PALM_EN Enable Autodetection of PAL M,
Address 0x07[2]
Setting AD_PALM_EN to 0 (default) disables the autodetection
of PAL M.
Setting AD_PALM_EN to 1 enables the detection.
AD_NTSC_EN Enable Autodetection of NTSC,
Address 0x07[1]
Setting AD_NTSC_EN to 0 (default) disables the detection of
standard NTSC.
Setting AD_NTSC_EN to 1 enables the detection.
FREE_RUN
TIME_WIN
F
SC
TAKE F
LOCK
SC
LOCK INTO ACCOUNT
1
0
SELECT THE RAW LOCK SIGNAL
SRLS
FSCLE
0
1
Figure 8. Lock-Related Signal Path
Rev. B | Page 21 of 100
COUNTER OUT OF LOCK
COUNTER INTO LOCK
FILTER THE RAW LOCK SIGNAL
CIL[2:0], COL[2:0]
AD_PAL_EN Enable Autodetection of PAL,
Address 0x07[0]
Setting AD_PAL_EN to 0 (default) disables the detection of
standard PAL.
Setting AD_PAL_EN to 1 enables the detection.
SFL_INV Subcarrier Frequency Lock Inversion
This bit controls the behavior of the PAL switch bit in the SFL
(GenLock Telegram) data stream. It was implemented to solve
some compatibility issues with video encoders. It solves two
problems.
First, the PAL switch bit is only meaningful in PAL. Some
encoders (including Analog Devices encoders) also look at the
state of this bit in NTSC.
Second, there was a design change in Analog Devices encoders
from ADV717x to ADV719x. The older versions used the SFL
(GenLock Telegram) bit directly, while the later ones invert the
bit prior to using it; this is because the inversion compensated
for the 1-line delay of an SFL (GenLock Telegram) transmission.
As a result, ADV717x encoders need the PAL switch bit in the
SFL (GenLock Telegram) to be 1 for NTSC to work. Also,
ADV7190/ADV7191/ADV7194 encoders need the PAL switch
bit in the SFL to be 0 to work in NTSC. If the state of the PAL
switch bit is wrong, a 180° phase shift occurs.
In a decoder/encoder back-to-back system in which SFL is
used, the bit must be set up properly for the specific encoder
used.
SFL_INV Function Address 0x41[6]
Setting SFL_INV to 0 makes the part SFL-compatible with
ADV7190/ADV7191/ADV7194 encoders.
Setting SFL_INV to 1 (default) makes the part SFL-compatible
with ADV717x/ADV7173x encoders.
Lock-Related Controls
Lock information is presented to the user through Bits[1:0] of
the Status 1 register. See the STATUS_1[7:0] Address 0x10[7:0]
section. Figure 8 outlines the signal flow and the controls
available to influence the way the lock status information is
generated.
MEMORY
STATUS 1 [0]
STATUS 1 [1]
ADV7181B

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