LFXP3E-4TN100C Lattice, LFXP3E-4TN100C Datasheet - Page 255

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LFXP3E-4TN100C

Manufacturer Part Number
LFXP3E-4TN100C
Description
IC FPGA 3.1KLUTS 62I/O 100-TQFP
Manufacturer
Lattice
Datasheet

Specifications of LFXP3E-4TN100C

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number:
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Part Number:
LFXP3E-4TN100C-3I
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LatticeECP/EC and LatticeXP
Lattice Semiconductor
DDR Usage Guide
Appendix F. DDR400 Interface using the LatticeEC Evaluation Board
The DDR400 interface was implemented using the LatticeEC20 device on the LatticeEC Advanced Evaluation
Board. Figures 10-21, 10-22 and 10-23 show the READ, WRITE and WRITE to READ transition operations running
at 200MHz. For more information on the evaluation board, refer to LatticeEC Advanced Evaluation Board User’s
Guide available on the Lattice web site at www.latticesemi.com.
Figure 10-21. READ Function Running at 200MHz
Note: An extra READ command is implemented in the LatticeEC20 device to protect the data during postamble.
This extra READ is not required for other LatticeEC devices. Refer to the DQS Postamble section of this document
for more information.
10-36

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