LH28F008SAHT-T9 Sharp Electronics, LH28F008SAHT-T9 Datasheet - Page 8

LH28F008SAHT-T9

Manufacturer Part Number
LH28F008SAHT-T9
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F008SAHT-T9

Cell Type
NOR
Density
8Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
20b
Operating Supply Voltage (typ)
5V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
11.4 to 12.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Word Size
8b
Number Of Words
1M
Supply Current
50mA
Mounting
Surface Mount
Pin Count
40
Lead Free Status / Rohs Status
Compliant
A
DQ
CE#
RP#
OE#
WE#
RY/BY#
V
V
GND
NC
0
PP
CC
Symbol
-A
0
-DQ
19
7
INPUT/OUTPUT
OUTPUT
SUPPLY
SUPPLY
SUPPLY
INPUT
INPUT
INPUT
INPUT
INPUT
Type
ADDRESS INPUTS: for memory addresses. Addresses are internally
latched during a write cycle.
DATA INPUT/OUTPUTS: Inputs data and commands during Command
User Interface write cycles; outputs data during memory array, Status
Register and Identifier read cycles. The data pins are active high and float
to tri-state off when the chip is deselected or the outputs are disabled.
Data is internally latched during a write cycle.
CHIP ENABLE: Activates the device's control logic input buffers
decoders, and sense amplifiers. CE# is active low; CE# high deselects the
memory device and reduces power consumption to standby levels.
RESET/POWERDOWN: Puts the device in deep powerdown mode and
resets internal automation. RP# is active low; RP# high gates normal
operation. RP# also locks out block erase or byte write operations when
active low, providing data protection during power transitions.
OUTPUT ENABLE: Gates the device's outputs through the data buffers
during a read cycle. OE# is active low.
WRITE ENABLE: Controls writes to the Command User Interface and
array blocks. WE# is active low. Addresses and data are latched on the
rising edge of the WE# pulse.
READY/BUSY#: Indicates the status of the internal Write State Machine.
When low, it indicates that the WSM is performing a block erase or byte
write operation. RY/BY# high indicates that the WSM is ready for new
commands, block erase is suspended or the device is in deep
powerdown mode. RY/BY# is always active and does NOT float to tri-state
off when the chip is deselected or data outputs are disabled.
BLOCK ERASE/BYTE WRITE POWER SUPPLY: for erasing blocks of
the array or writing bytes of each block.
DEVICE POWER SUPPLY (5V±0.5V, 5V±0.25V)
GROUND
NO CONNECT: Lead is not internal connected; recommend to be floated.
With V
PP
Table 1. Pin Description
<V
PPLMAX
LHF08ST9
, memory contents cannot be altered.
Name and Function
NOTE:
5

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