CY7C68013-56LFC Cypress Semiconductor Corp, CY7C68013-56LFC Datasheet - Page 39

• Manufacturer Part Number: CY7C68013-56LFC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C68013-56LFC

• Cpu Family: FX2LP
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 48MHz
• Interface Type: USB
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Total Internal Ram Size: 8KB
• # I/os (max): 24
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 56
• Package Type: QFN EP
• Lead Free Status / Rohs Status: Not Compliant

9.14
Table 9-16. Slave FIFO Synchronous Address Parameters
9.15
Table 9-17. Slave FIFO Asynchronous Address Parameters
Document #: 38-08012 Rev. *F
t
t
t
t
t
t
IFCLK
SFA
FAH
SFA
FAH
FAH
Parameter
Parameter
Slave FIFO Synchronous Address
Slave FIFO Asynchronous Address
Interface Clock Period
FIFOADR[1:0] to Clock Set-up Time
Clock to FIFOADR[1:0] Hold Time
FIFOADR[1:0] to RD/WR/PKTEND Set-up Time
SLRD/PKTEND to FIFOADR[1:0] Hold Time
SLWR/PKTEND to FIFOADR[1:0] Hold Time
SLCS/FIFOADR [1:0]
SLCS/FIFOADR [1:0]
Figure 9-15. Slave FIFO Asynchronous Address Timing Diagram
SLRD/SLWR/PKTEND
Figure 9-14. Slave FIFO Synchronous Address Timing Diagram
IFCLK
Description
Description
t
SFA
[15]
[16]
t
SFA
t
FAH
t
FAH
20.83
Min.
Min.
25
10
10
20
70
[13]
Max.
Max.
200
CY7C68013
Page 39 of 48
Unit
Unit
ns
ns
ns
ns
ns
ns