UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 504

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UPD78F0078GK-9ET-A

Manufacturer Part Number
UPD78F0078GK-9ET-A
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0078GK-9ET-A

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502
Subsystem Clock Oscillator Characteristics (T
Notes 1. Indicates only oscillator characteristics. Refer to AC Characteristics for instruction execution time.
Cautions 1. When using the subsystem clock oscillator, wire as follows in the area enclosed by the broken
CHAPTER 26 ELECTRICAL SPECIFICATIONS (EXPANDED-SPECIFICATION PRODUCTS OF PD780076Y, 780078Y, 78F0078Y)
Crystal
resonator
External
clock
Resonator
2. Time required to stabilize oscillation after V
2. The subsystem clock oscillator is designed as a low-amplitude circuit for reducing power
Recommended Circuit
lines in the above figure to avoid an adverse effect from wiring capacitance.
• Keep the wiring length as short as possible.
• Do not cross the wiring with the other signal lines.
• Do not route the wiring near a signal line through which a high fluctuating current flows.
• Always make the ground point of the oscillator capacitor the same potential as V
• Do not ground the capacitor to a ground pattern through which a high current flows.
• Do not fetch signals from the oscillator.
consumption, and is more prone to malfunction due to noise than the main system clock
oscillator. Particular care is therefore required with the wiring method when the subsystem
clock is used.
XT2 XT1 V
XT2
Rd
C4
C3
XT1
SS1
Oscillation
frequency (f
Oscillation
stabilization time
XT1 input
frequency (f
XT1 input
high-/low-level width
(t
XTH
, t
Parameter
XTL
User’s Manual U14260EJ4V0UD
)
XT
XT
A
)
)
Note 1
Note 1
= –40 to +85 C, V
Note 2
DD
reaches oscillation voltage range MIN.
3.0 V
1.8 V
Conditions
V
V
DD
DD
DD
= 1.8 to 5.5 V)
5.5 V
3.0 V
MIN.
12
32
32
32.768
TYP.
1.2
MAX.
38.5
15
35
10
2
SS1
.
Unit
kHz
kHz
s
s

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