TC58DVM82A1FT00 Toshiba, TC58DVM82A1FT00 Datasheet - Page 17

• Manufacturer Part Number: TC58DVM82A1FT00
• Manufacturer: Toshiba

Specifications of TC58DVM82A1FT00

• Cell Type: NAND
• Density: 256Mb
• Access Time (max): 35ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 25b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSOP-I
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 32M
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

Operation Mode: Logic and Command Tables
operations shown in Table 3. Address input, command input and data input/output are controlled by the CLE,
ALE, CE , WE , RE and WP signals, as shown in Table 2.
Table 2. Logic table
Command Input
Address Input
Data Input
Serial Data Output
During Programming (Busy)
During Erasing (Busy)
Program, Erase Inhibit
Standby
H: V
* 1: Refer to Application Note (10) toward the end of this document regarding the WP signal when Program or Erase Inhibit
Table 3. Command table (HEX)
Serial Data Input
Read Mode (1)
Read Mode (2)
Read Mode (3)
Reset
Auto Program
Auto Block Erase
Status Read
ID Read
Table 4. Read mode operation states
Output Select
Output Deselect
Standby
H: V
The operation modes such as Program, Erase, Read and Reset are controlled by the ten different command
Table 4 shows the operation states for Read mode.
IH
IH
, L: V
, L: V
IL
IL
, * : V
, * : V
IH
IH
or V
or V
IL
IL
First Cycle
CLE
L
L
L
FF
80
00
01
50
10
60
70
90
Second Cycle
ALE
L
L
L
CLE
D0








H
L
L
L
*
*
*
*
CE
H
L
L
Acceptable while Busy
ALE
H
L
L
L
*
*
*
*
WE
H
H
H
CE
H
L
L
L
L
*
*
*
RE
＊
H
L
HEX data bit assignment
(Example)
I/O8 7
1
High impedance
High impedance
WE
H
*
*
*
*
TC58DVM82A1FT00
Data output
0
I/O1~I/O8
Serial data input: 80H
0
6
2003-03-25 17/34
0
5
RE
H
H
H
*
*
*
*
0
4
0
3
Standby
Power
Active
Active
0
2 I/O1
0 V/Vcc
WP
0
H
H
H
*
*
*
L
*1