ISL5416KI Intersil, ISL5416KI Datasheet - Page 56

• Manufacturer Part Number: ISL5416KI
• Description: Up/Down Conv Mixer 1.8V 256-Pin BGA
• Manufacturer: Intersil

Specifications of ISL5416KI

• Package: 256BGA
• Operating Supply Voltage: 1.8 V

ISL5416
TABLE 83. FIR 2 COEFFICIENTS (64 x 20) (IWA = *200h THRU *23Fh) RESET STATE = UNDEFINED
P(31:0)
FUNCTION
Each multiplier has up to 8 coefficients. If the six bit coefficient addresses are labeled M2 M1 M0 C2 C1 C0, where the M-bits
select the multiplier (000 is the first multiplier encountered by the data samples), and the C-bits select the coefficient (000 is the
first coefficient encountered by the data samples). M2 is not used for FIR1.
For example, if an eight tap filter is used for FIR1, the coefficients would be loaded:
(earliest)
C0 --- 000000 (*100h)
C1 --- 000001
C2 --- 001000
C3 --- 001001
C4 --- 010000
C5 --- 010001
C6 --- 011000
C7 --- 011010 (*11Ah)
When the Half Band Filter mode is enabled for FIR1, the zero valued zero crossing coefficients are not loaded, but the
coefficients must be centered around the hard wired center tap. This means that zeros valued coefficients must be added if the
number of coefficients per multiplier is not uniform. For example, with an 11-tap Half Band Filter with coefficients:
C0, 0, C1, 0, C2, 0.5, C3, 0, C4, 0, C5,
the coefficient loading would be:
0 ----- 000000 (*100h)
C0 --- 000001
C1 --- 001000
C2 --- 001001
C3 --- 010000
C4 --- 010001
C5 --- 011000
0 ----- 011001 (*119h)
The filter computation requires two clock cycles for the computation. Due to the added zero-valued coefficients, the group delay
has increased from 6 to 8 sample periods.
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