ISL5416KI Intersil, ISL5416KI Datasheet - Page 8

• Manufacturer Part Number: ISL5416KI
• Description: Up/Down Conv Mixer 1.8V 256-Pin BGA
• Manufacturer: Intersil

Specifications of ISL5416KI

• Package: 256BGA
• Operating Supply Voltage: 1.8 V

SYNCInX Use
SYNCInX main purpose is as a processing start-up signal
after a reset to align the start of processing of multiple
channels or chips. This assures that the carrier phases have
a known relationship and that the output timing aligns for
multiplexing outputs. It can also be used after start-up as a
system timing synchronization signal. Two SYNCInX signals
are provided so that one can be used as a regularly
occurring signal (such as at time slot boundaries) and one
as an infrequent signal (such as at start up or at 1 pps). If
more than one air interface standard is processing in one
part, one SYNCInX signal could be used for the slot timing
for each standard.
CLKC
CLKX
CLKC
CLKX
XIN(16:0)
CLK/CLK
ENIX
CLKX
CLKC
NOTE: To simplify the board routing, each of the four input data busses can be reversed, MSB for LSB (see IWA = 0*00h, bit 4)
CLKX/CLKC
R1
M U X
R
E
G
R1
^
R
M U X
R2
R
E
G
^
R1
8
R2
R3
R
E
G
^
R2
R4
R
E
G
^
(16:0)
R3
R3
BUS REVERSE
(0:16)
FIGURE 1. INPUT SECTION
M
U
X
R4
R4
OBIN
F
M
T
ISL5416
FLOAT/FIX
R
M
A
P
SLOT#
Register updates from a processor write are synchronized to
the clock, so that the register updates in multiple channels of
the same part are time aligned. However, when
synchronizing multiple parts the processor will need
knowledge of the SYNCInX timing so that enabling the
SYNCInX in multiple parts occurs between SYNCInX pulses.
Alternatively, SYNCIn1 could be used as a regularly
occurring SYNCI signal and SYNCIn2 could be a gated
version. The channel processing control register might only
be updated on SYNCIn2 and the other SYNCI functions
would respond to SYNCIn1.
D
M
U
X
R
E
G
^
DIN (ONLY)
MANTISSA
EXPONENT
INTERPOLATE
TO CHANNELS
AND RANGE
CONTROL
PROCESSING
ENABLE
TO SERIAL
FREQUENCY
OFFSET
CLK