IDT82P2821BHG IDT, Integrated Device Technology Inc, IDT82P2821BHG Datasheet - Page 39

• Manufacturer Part Number: IDT82P2821BHG
• Description: IC LINE INTERFACE UNIT 640-PBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82P2821BHG

• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 1
• Voltage - Supply: 1.8V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: *
• Includes: Defect and Alarm Detection, Driver Over-Current Detection and Protection, LLOS Detection, PRBSARB / IB Detection and Generation
• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Power (watts): -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 800-1703; 82P2821BHG

3.3.5
applications.
and TTIPn and TRINGn will enter High-Z state immediately.
3.3.5.1 Transmit Over Current Protection
line interface. When TOC is detected, the driver’s output (i.e., output on
TTIPn/TRINGn) is determined by the THZ_OC bit (b4, TCF0,...). If the
THZ_OC bit (b4, TCF0,...) is ‘0’, the driver’s output current (peak to
peak) is limited to 100 mA; if the THZ_OC bit (b4, TCF0,...) is ‘1’, the
driver’s output will enter High-Z. TOC is indicated by the TOC_S bit (b4,
STAT0,...). A transition from ‘0’ to ‘1’ on the TOC_S bit (b4, STAT0,...) or
any transition (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the TOC_S bit (b4,
STAT0,...) will set the TOC_IS bit (b4, INTS0,...) to ‘1’, as selected by the
TOC_IES bit (b4,
an interrupt will be reported by INT if not masked by the TOC_IM bit (b4,
INTM0,...).
TMFn Indication for details.
Table-15 Impedance Matching Value in Transmit Differential Mode
Functional Description
IDT82P2821
The Line Driver can be set to High-Z for protection or in redundant
The following two ways will set the Line Driver to High-Z:
• Setting the OE pin to low will globally set all the Line Drivers to
• Setting the OE bit (b6, TCF0,...) to ‘0’ will set the corresponding
By these ways, the functionality of the internal circuit is not affected
The Line Driver monitors the Transmit Over Current (TOC) on the
TOC may be indicated by the TMFn pin. Refer to Section 3.5.7.2
E1 120 Ω twisted pair (with transformer), PULS[3:0]=0001
E1 120 Ω twisted pair (transformer-less), PULS[3:0]=0001
High-Z;
Line Driver to High-Z.
E1 75 Ω coaxial (with transformer), PULS[3:0]=0000
LINE DRIVER
T1 100 Ω twisted pair (with transformer)
T1 100 Ω twisted pair (transformer-less)
J1 110 Ω twisted pair (with transformer)
J1 110 Ω twisted pair (transformer-less)
INTES
Cable Condition
,...). When the TOC_IS bit (b4, INTS0,...) is ‘1’,
T_TERM[2:0]
Internal Impedance Matching
000
001
010
011
100
101
110
21(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
39
3.3.6
Transmit Single Ended mode, as selected by the T_SING bit (b3,
TCF0,...). In Transmit Differential mode, both TTIPn and TRINGn are
used to transmit signals to the line side. In Transmit Single Ended mode,
only TTIPn is used to transmit signal.
120 Ω twisted pair cable or E1 75 Ω coaxial cable.
impedance matching or external impedance matching for each channel
in different applications.
3.3.6.1 Transmit Differential Mode
impedance matching. For T1/J1 applications, only Internal Impedance
Matching is supported. For E1 applications, both Internal and External
Impedance Matching are supported.
resistor (IM) only.
only.
former or without a transformer (transformer-less), while a coaxial cable
must be connected with a 1:2 transformer.
different cable conditions, whether a transformer is used, and what kind
of Impedance Matching is selected.
different applications. Figure-19 to Figure-21 show the connection for
one channel in different applications.
reduced cost and board space. However, the waveform amplitude is not
standard compliant, and surge protection and common mode depres-
sion should be enhanced depending on equipment environment..
The transmit line interface supports Transmit Differential mode and
The line interface can be connected with T1 100 Ω, J1 110 Ω or E1
The transmit impedance matching is realized by using internal
In Transmit Differential mode, different applications have different
Internal Impedance Matching circuit uses an internal programmable
External Impedance Matching circuit uses an external resistor (Rt)
A twisted pair cable can be connected with a 1:2 (step up) trans-
The T_TERM[2:0] bits (b2~0, TCF0,...) should be set according to
Table-15 lists the recommended impedance matching value in
The transformer-less connection will offer a termination option with
T
X
TERMINATION
Rt
0
T_TERM[2:0]
External Impedance Matching
111
(not supported)
(not supported)
February 6, 2009
10 Ω
Rt