74VHC08MSCX Fairchild Semiconductor, 74VHC08MSCX Datasheet

no-image

74VHC08MSCX

Manufacturer Part Number
74VHC08MSCX
Description
Quad 2-Input AND Gate
Manufacturer
Fairchild Semiconductor
Datasheet
© 1999 Fairchild Semiconductor Corporation
74VHC08M
74VHC08SJ
74VHC08MTC
74VHC08N
74VHC08
General Description
The VHC08 is an advanced high speed CMOS 2 Input
AND Gate fabricated with silicon gate CMOS technology. It
achieves the high-speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation.
The internal circuit is composed of 4 stages including buffer
output, which provide high noise immunity and stable out-
put. An input protection circuit insures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery backup. This cir-
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Order Number
Quad 2-Input AND Gate
A
O
n
n
, B
Pin Names
n
Package Number
MTC14
IEEE/IEC
M14A
M14D
N14A
Inputs
Outputs
Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
DS011514.prf
cuit prevents device destruction due to mismatched supply
and input voltages.
Features
Connection Diagram
Truth Table
High Speed: t
High noise immunity: V
Power down protection is provided on all inputs
Low power dissipation: I
Low noise: V
Pin and function compatible with 74HC08
Package Description
A
H
H
L
L
OLP
PD
4.3 ns (typ) at T
0.8V (max)
NIH
CC
B
H
H
L
L
November 1992
Revised March 1999
V
2 A (Max) @ T
NIL
A
28% V
25 C
www.fairchildsemi.com
O
H
L
L
L
CC
(min)
A
25 C

Related parts for 74VHC08MSCX

74VHC08MSCX Summary of contents

Page 1

... Pin Names Description Inputs Outputs n © 1999 Fairchild Semiconductor Corporation cuit prevents device destruction due to mismatched supply and input voltages. Features High Speed: t 4.3 ns (typ High noise immunity: V Power down protection is provided on all inputs Low power dissipation: I Low noise: V ...

Page 2

Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage ( OUT Input Diode Current ( Output Diode Current ( Output Current (I ) ...

Page 3

AC Electrical Characteristics V CC Symbol Parameter (V) t Propagation Delay 3.3 PHL t PLH 5.0 C Input Capacitance IN C Power Dissipation Capacitance PD Note defined as the value of the internal equivalent capacitance which is ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M14A Package Number M14D 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN ...

Related keywords