AD8331ARQ-REEL Analog Devices Inc, AD8331ARQ-REEL Datasheet - Page 9

• Manufacturer Part Number: AD8331ARQ-REEL
• Description: IC VGA SINGLE W/PREAMP 20-SSOP
• Manufacturer: Analog Devices Inc
• Series: X-AMP®r
• Type: Variable Gain Amplifierr

Specifications of AD8331ARQ-REEL

• Rohs Status: RoHS non-compliant
• Design Resources: Interfacing the High Frequency AD8331 to AD9215 (CN0096)
• Applications: Signal Processing
• Mounting Type: Surface Mount
• Package / Case: 20-QSOP
• For Use With: AD8331-EVALZ - BOARD EVAL FOR AD8331

Table 4. 28-Lead TSSOP Pin Function Description (AD8332)
Pin No. Mnemonic
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
LMD2
INH2
VPS2
LON2
LOP2
COM2
VIP2
VIN2
VCM2
GAIN
RCLMP
VOH2
VOL2
COMM
VPSV
VOL1
VOH1
ENB
HILO
VCM1
VIN1
VIP1
COM1
LOP1
LON1
VPS1
INH1
LMD1
Figure 4. 28-Lead TSSOP Pin Configuration (AD8332)
RCLMP
COMM
COM2
LMD2
VCM2
VOH2
LON2
LOP2
VOL2
VPS2
GAIN
INH2
VIN2
VIP2
10
11
12
13
14
1
2
3
4
5
6
7
8
9
Description
CH 2 LNA Midsupply Pin; Connect a
Capacitor for Midsupply HF Bypass
CH2 LNA Input
CH2 Supply LNA 5 V
CH2 LNA Inverting Output
CH2 LNA Noninverting Output
CH2 LNA Ground
CH2 VGA Noninverting Input
CH2 VGA Inverting Input
CH2 Common-Mode Voltage
Gain Control Voltage
Output Clamping Resistor
CH2 Noninverting VGA Output
CH2 Inverting VGA Output
VGA Ground (Both Channels)
VGA Supply 5 V (Both Channels)
CH1 Inverting VGA Output
CH1 Noninverting VGA Output
Enable—VGA/LNA
VGA Gain Range Select (HI or LO)
CH1 Common-Mode Voltage
CH1 VGA Inverting Input
CH1 VGA Noninverting Input
CH1 LNA Ground
CH1 LNA Noninverting Output
CH1 LNA Inverting Output
CH1 LNA Supply 5 V
CH1 LNA Input
CH 1 LNA Midsupply Pin; Connect a
Capacitor for Midsupply HF Bypass
(Not to Scale)
AD8332
TOP VIEW
PIN 1
INDICATOR
28
27
26
25
24
23
22
21
20
19
18
17
16
15
LMD1
INH1
VPS1
LON1
LOP1
COM1
VIP1
VIN1
VCM1
HILO
ENB
VOH1
VOL1
VPSV
Rev. G | Page 9 of 56
Table 5. 32-Lead LFCSP Pin Function Description (AD8332)
Pin No. Mnemonic
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
LMD1
LMD2
LON1
LON2
VPS1
VPS2
LON1
VPS1
INH1
LMD1
LMD2
INH2
VPS2
LON2
LOP2
COM2
VIP2
VIN2
VCM2
MODE
GAIN
RCLMP
COMM
VOH2
VOL2
NC
VPSV
VOL1
VOH1
COMM
ENBV
ENBL
HILO
VCM1
VIN1
VIP1
COM1
LOP1
INH1
INH2
Figure 5. 32-Lead LFCSP Pin Configuration (AD8332)
NC = NO CONNECT
1
2
3
4
5
6
7
8
32
9
PIN 1
INDICATOR
10
31
Description
CH1 LNA Inverting Output
CH1 LNA Supply 5 V
CH1 LNA Input
CH2 LNA Input
CH2 LNA Supply 5 V
CH2 LNA Inverting Output
CH2 LNA Noninverting Output
CH2 LNA Ground
CH2 VGA Noninverting Input
CH2 VGA Inverting Input
CH2 Common-Mode Voltage
Gain Slope Logic Input
Gain Control Voltage
Output Clamping Level Input
VGA Ground
CH2 Noninverting VGA Output
CH2 Inverting VGA Output
No Connect
VGA Supply 5 V
CH1 Inverting VGA Output
CH1 Noninverting VGA Output
VGA Ground
VGA Enable
LNA Enable
VGA Gain Range Select (HI or LO)
CH1 Common-Mode Voltage
CH1 VGA Inverting Input
CH1 VGA Noninverting Input
CH1 LNA Ground
CH1 LNA Noninverting Output
CH 1 LNA Midsupply Pin; Connect a
Capacitor for Midsupply HF Bypass
CH 2 LNA Midsupply Pin; Connect a
Capacitor for Midsupply HF Bypass
AD8331/AD8332/AD8334
11
30
(Not to Scale)
AD8332
TOP VIEW
12
29
13
28
14
27
15
26
16
25
24
23
22
21
20
19
18
17
COMM
VOH1
VOL1
VPSV
NC
VOL2
VOH2
COMM