AT89C51RD2 Atmel Corporation, AT89C51RD2 Datasheet - Page 21

• Manufacturer Part Number: AT89C51RD2
• Manufacturer: Atmel Corporation

Specifications of AT89C51RD2

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 60 MHz
• Cpu: 8051-12C
• Max I/o Pins: 32
• Spi: 1
• Uart: 1
• Sram (kbytes): 2
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 5.5
• Timers: 4
• Isp: UART
• Watchdog: Yes

8. Dual Data Pointer Register (DPTR)
Figure 8-1.
4235K–8051–05/08
Use of Dual Pointer
7
AUXR1(A2H)
The additional data pointer can be used to speed up code execution and reduce code size.
The dual DPTR structure is a way by which the chip will specify the address of an external data
memory location. There are two 16-bit DPTR registers that address the external memory, and a
single bit called DPS = AUXR1.0 (see Table 8-1) that allows the program code to switch
between them (Refer to Figure 8-1).
Table 8-1.
AUXR1- Auxiliary Register 1(0A2h)
Number
Bit
7
7
6
5
4
3
2
1
0
-
Mnemonic
ENBOOT
AUXR1 Register
DPS
0
GF3
DPS
Bit
6
0
-
-
-
-
-
Description
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Enable Boot Flash
Cleared to disable boot ROM.
Set to map the boot ROM between F800h - 0FFFFh.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
This bit is a general-purpose user flag.
Always cleared
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Data Pointer Selection
Cleared to select DPTR0.
Set to select DPTR1.
ENBOOT
DPH(83H) DPL(82H)
5
DPTR1
4
-
DPTR0
GF3
3
(1)
AT89C51RD2/ED2
2
0
External Data Memory
1
-
DPS
0
21