AT89C51RD2 Atmel Corporation, AT89C51RD2 Datasheet - Page 44

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AT89C51RD2

Manufacturer Part Number
AT89C51RD2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51RD2

Flash (kbytes)
64 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Uart
1
Sram (kbytes)
2
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes

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Figure 13-4. PCA Compare Mode and PCA Watchdog Timer
13.3
44
High Speed Output Mode
CCAPnH
Write to
AT89C51RD2/ED2
1
CCAPnL
Write to
0
Before enabling ECOM bit, CCAPnL and CCAPnH should be set with a non zero value, other-
wise an unwanted match could happen. Writing to CCAPnH will set the ECOM bit.
Once ECOM is set, writing CCAPnL will clear ECOM so that an unwanted match doesn’t occur
while modifying the compare value. Writing to CCAPnH will set ECOM. For this reason, user
software should write CCAPnL first, and then CCAPnH. Of course, the ECOM bit can still be
controlled by accessing to CCAPMn register.
In this mode the CEX output (on port 1) associated with the PCA module will toggle each time a
match occurs between the PCA counter and the modules capture registers. To activate this
mode the TOG, MAT, and ECOM bits in the module's CCAPMn SFR must be set (See
Figure 13-5).
A prior write must be done to CCAPnL and CCAPnH before writing the ECOMn bit.
Reset
Enable
CCAPnH
CH
PCA counter/timer
16 bit comparator
CIDL
CF
ECOMn
WDTE
CCAPnL
CR
CL
CAPPn
Match
CAPNn MATn TOGn PWMn ECCFn
CCF4
CCF3
CCF2 CCF1 CCF0
CPS1 CPS0
ECF
CCON
0xD8
CCAPMn, n = 0 to 4
0xDA to 0xDE
CMOD
0xD9
PCA IT
RESET *
4235K–8051–05/08

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