AT89C51RD2 Atmel Corporation, AT89C51RD2 Datasheet - Page 82

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AT89C51RD2

Manufacturer Part Number
AT89C51RD2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51RD2

Flash (kbytes)
64 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Uart
1
Sram (kbytes)
2
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes

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82
AT89C51RD2/ED2
Note:
Note:
Table 18-1.
Reset
Idle (internal
code)
Idle (external
code)
Power-Down
(internal
code)
Power-Down
(external
code)
3. Generate an enabled external Keyboard interrupt (same behavior as external interrupt).
Mode
continue for a number of clock cycles before the internal reset algorithm takes
control. Reset initializes the AT89C51RD2/ED2 and vectors the CPU to address
0000h.
During the time that execution resumes, the internal RAM cannot be accessed; however, it is pos-
sible for the Port pins to be accessed. To avoid unexpected outputs at the Port pins, the instruction
immediately following the instruction that activated the Power-Down mode should not write to a
Port pin or to the external RAM.
Exit from power-down by reset redefines all the
content.
Pin Conditions in Special Operating Modes
Floating
Floating
Floating
Port 0
Data
Data
Port 1
High
Data
Data
Data
Data
Port 2
High
Data
Data
Data
Data
SFRs
Port 3
High
Data
Data
Data
Data
, but does not affect the internal RAM
Port 4
High
Data
Data
Data
Data
High
High
High
ALE
Low
Low
4235K–8051–05/08
PSEN#
High
High
High
Low
Low

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