AD9613 Analog Devices, AD9613 Datasheet - Page 9

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AD9613

Manufacturer Part Number
AD9613
Description
12-bit, 170/210/250 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)
Manufacturer
Analog Devices
Datasheet

Specifications of AD9613

Resolution (bits)
12bit
# Chan
2
Sample Rate
250MSPS
Interface
LVDS,Par
Analog Input Type
Diff-Bip
Ain Range
1.75 V p-p
Adc Architecture
Pipelined
Pkg Type
CSP
Data Sheet
TIMING SPECIFICATIONS
Table 5.
Parameter
SYNC TIMING REQUIREMENTS
SPI TIMING REQUIREMENTS
t
t
t
t
t
t
t
t
t
t
t
SSYNC
HSYNC
DS
DH
CLK
S
H
HIGH
LOW
EN_SDIO
DIS_SDIO
Test Conditions/Comments
See Figure 3 for timing details
SYNC to the rising edge of CLK setup time
SYNC to the rising edge of CLK hold time
See Figure 58 for SPI timing diagram
Setup time between the data and the rising edge of SCLK
Hold time between the data and the rising edge of SCLK
Period of the SCLK
Setup time between CSB and SCLK
Hold time between CSB and SCLK
Minimum period that SCLK should be in a logic high state
Minimum period that SCLK should be in a logic low state
Time required for the SDIO pin to switch from an input to an output
relative to the SCLK falling edge (not shown in Figure 58)
Time required for the SDIO pin to switch from an output to an input
relative to the SCLK rising edge (not shown in Figure 58)
Rev. B | Page 9 of 36
Min
2
2
40
2
2
10
10
10
10
Typ
0.3
0.4
Max
AD9613
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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