AD9122 Analog Devices, AD9122 Datasheet - Page 10

• Manufacturer Part Number: AD9122
• Manufacturer: Analog Devices

Specifications of AD9122

• Resolution (bits): 16bit
• Dac Update Rate: 1.23GSPS
• Dac Settling Time: n/a
• Max Pos Supply (v): +3.47V
• Single-supply: No
• Dac Type: Current Out
• Dac Input Format: LVDS,Par

AD9122
Pin No.
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
Mnemonic
D8P
D8N
DCIP
DCIN
DVDD18
DVSS
D7P
D7N
D6P
D6N
D5P
D5N
D4P
D4N
D3P
D3N
D2P
D2N
DVDD18
DVSS
D1P
D1N
D0P
D0N
DVDD18
SDO
SDIO
SCLK
CS
RESET
NC
AVSS
AVDD33
IOUT2P
IOUT2N
AVDD33
AVSS
REFIO
FSADJ
AVSS
AVDD33
IOUT1N
IOUT1P
AVDD33
REFCLKN
REFCLKP
CVDD18
CVDD18
EPAD
Description
Data Bit 8, Positive.
Data Bit 8, Negative.
Data Clock Input, Positive.
Data Clock Input, Negative.
1.8 V Digital Supply. Supplies power to digital core and digital data ports.
Digital Common.
Data Bit 7, Positive.
Data Bit 7, Negative.
Data Bit 6, Positive.
Data Bit 6, Negative.
Data Bit 5, Positive.
Data Bit 5, Negative.
Data Bit 4, Positive.
Data Bit 4, Negative.
Data Bit 3, Positive.
Data Bit 3, Negative.
Data Bit 2, Positive.
Data Bit 2, Negative.
1.8 V Digital Supply. Supplies power to digital core and digital data ports.
Digital Common.
Data Bit 1, Positive.
Data Bit 1, Negative.
Data Bit 0 (LSB), Positive.
Data Bit 0 (LSB), Negative.
1.8 V Digital Supply. Supplies power to digital core and digital data ports.
Serial Port Data Output (CMOS Levels with Respect to IOVDD).
Serial Port Data Input/Output (CMOS Levels with Respect to IOVDD).
Serial Port Clock Input (CMOS Levels with Respect to IOVDD).
Serial Port Chip Select, Active Low (CMOS Levels with Respect to IOVDD).
Reset, Active Low (CMOS Levels with Respect to IOVDD).
No Connect. Do not connect to this pin.
Analog Supply Common.
3.3 V Analog Supply.
Q DAC Positive Current Output.
Q DAC Negative Current Output.
3.3 V Analog Supply.
Analog Supply Common.
Voltage Reference. Nominally 1.2 V output. Should be decoupled to AVSS.
Full-Scale Current Output Adjust. Place a 10 kΩ resistor from this pin to AVSS.
Analog Supply Common.
3.3 V Analog Supply.
I DAC Negative Current Output.
I DAC Positive Current Output.
3.3 V Analog Supply.
PLL Reference Clock Input, Negative. This pin has a secondary function as a synchronization input.
PLL Reference Clock Input, Positive. This pin has a secondary function as a synchronization input.
1.8 V Clock Supply. Supplies clock receivers, clock distribution, and PLL circuitry.
1.8 V Clock Supply. Supplies clock receivers, clock distribution, and PLL circuitry.
The exposed pad (EPAD) must be soldered to the ground plane (AVSS). The EPAD provides an electrical,
thermal, and mechanical connection to the board.
Rev. B | Page 10 of 60