ADP5589 Analog Devices, ADP5589 Datasheet - Page 18

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ADP5589

Manufacturer Part Number
ADP5589
Description
Keypad Decoder and I/O Expansion
Manufacturer
Analog Devices
Datasheet

Specifications of ADP5589

Vin Range
1.8 to 3.0V
Number Of I/os
19
Application
Mobil I-0 Exp-Keybd Cont,Mobil I-O Expander
Qwerty Keypad
Yes
Other Functions
I2C I/O & register
Function Flag
Mobil I-O
Package
24-Lead LFCSP,25-Ball WLCSP

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Manufacturer
Quantity
Price
Part Number:
ADP5589ACPZ-00-R7
Manufacturer:
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Quantity:
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ADP5589
The RESET1 signal uses I/O Pin R4 as its output. A pass-
through mode allows the main RST pin to be output on the
R4 pin also.
The RESET2 signal uses I/O Pin C4 as its output.
The reset generation signals are useful in situations where the
system processor has locked up and the system is unresponsive
to input events. The user can press one of the reset event combina-
tions and initiate a system-wide reset. This alleviates the need
for removing the battery from the system and performing a
hard reset.
It is not recommended to use the immediate trigger time (see
the details of the RESET_CFG Register, 0x3D, in Table 69)
because this setting may cause false triggering.
RESET_TRIGGER_TIME[2:0]
RESET1_EVENT_A[7:0]
RESET1_EVENT_B[7:0]
RESET1_EVENT_C[7:0]
RESET2_EVENT_A[7:0]
RESET2_EVENT_B[7:0]
Figure 25. Reset Blocks
RST_PASSTHRU_EN
CONTROL
CONTROL
CONTROL
LOGIC
BLOCK
SCAN
SCAN
KEY
GPI
RESET1_
RESET2_
INITIATE
INITIATE
RST
RESET_PULSE_WIDTH[1:0]
RESET
RESET
GEN 1
GEN 2
RESET1
RESET2
(R4)
(C4)
Rev. A | Page 18 of 48
INTERRUPTS
The INT pin can be asserted low if any of the internal interrupt
sources is active. The user can select which internal interrupts
interact with the external interrupt pin in register INT_EN
(Address 0x4E, Bits[7:0]) (refer to
choose whether the external interrupt pin remains asserted, or
deasserts for 50 μs, then reasserts, in the case that there are
multiple internal interrupts asserted, and one is cleared (refer
to
Table 85
).
LOGIC1_INT
OVRFLOW_IEN
EVENT_INT
GPI_INT
LOCK_INT
LOGIC2_INT
OVRFLOW_INT
LOGIC1_IEN
LOGIC2_IEN
EVENT_IEN
LOCK_IEN
GPI_IEN
Figure 26. Asserting INT Low
INT_CFG
INT DRIVE
Table 86
). allows the user to
INT

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