ADP5589 Analog Devices, ADP5589 Datasheet - Page 42

• Manufacturer Part Number: ADP5589
• Description: Keypad Decoder and I/O Expansion
• Manufacturer: Analog Devices

Specifications of ADP5589

• Vin Range: 1.8 to 3.0V
• Number Of I/os: 19
• Application: Mobil I-0 Exp-Keybd Cont,Mobil I-O Expander
• Qwerty Keypad: Yes
• Other Functions: I2C I/O & register
• Function Flag: Mobil I-O
• Package: 24-Lead LFCSP,25-Ball WLCSP

ADP5589
CLOCK_DIV_CFG Register 0x43
Table 75. CLOCK_DIV_CFG Bit Descriptions
Bits
7
6
[5: 1]
0
LOGIC_1_CFG Register 0x44
Table 76. LOGIC_1_CFG Bit Descriptions
Bits
7
6
5
4
3
[2: 0]
LOGIC_2_CFG Register 0x45
Table 77. LOGIC_2_CFG Bit Descriptions
Bits
7
6
5
4
3
Name
CLK_INV
CLK_DIV[4:0]
CLK_DIV_EN
Name
LY1_INV
LC1_INV
LB1_INV
LA1_INV
LOGIC1_SEL[2:0]
Name
LY1_CASCADE
LY2_INV
LC2_INV
LB2_INV
LA2_INV
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
0 = use Input LA2 for Logic Block 2.
1 = use Output LY1 from Logic Block 1 instead of LA2 as the input for Logic Block 2.
The R0 pin can be used as GPIO or key when cascade is in use.
0 = LY2 input not inverted before passing into Logic Block 2.
1 = inverts Output LY2 from Logic Block 2.
0 = LC2 input not inverted before passing into Logic Block 2.
1 = inverts Input LC2 before passing it into Logic Block 2.
0 = LB2 input not inverted before passing into Logic Block 2.
1 = inverts Input LB2 before passing it into Logic Block 2.
0 = LA2 input not inverted before passing into Logic Block 2.
1 = inverts Input LA2 before passing it into Logic Block 2.
Defines the divide down scale of the externally supplied clock.
Enables the clock divider circuit to divide down the externally supplied clock signal.
0 = LY1 output not inverted before passing into Logic Block 1.
0 = LC1 input not inverted before passing into Logic Block 1.
0 = LB1 input not inverted before passing into Logic Block 1.
Configures the digital mux for Logic Block 1.
Description
Reserved.
Inverts the divided down clock signal.
00000 = divide by 1 (pass-through).
00001 = divide by 2.
00010 = divide by 3.
00011 = divide by 4.
11111 = divide by 32.
Description
Reserved.
1 = inverts output LY1 from Logic Block 1.
1 = inverts input LC1 before passing it into Logic Block 1.
1 = inverts input LB1 before passing it into Logic Block 1.
0 = LA1 input not inverted before passing into Logic Block 1.
1 = inverts input LA1 before passing it into Logic Block 1.
000 = off/disable.
001 = AND1.
010 = OR1.
011 = XOR1.
100 = FF1.
101 = IN_LA1.
110 = IN_LB1.
111 = IN_LC1.
Rev. A | Page 42 of 48