ADP5589 Analog Devices, ADP5589 Datasheet - Page 8

• Manufacturer Part Number: ADP5589
• Description: Keypad Decoder and I/O Expansion
• Manufacturer: Analog Devices

Specifications of ADP5589

• Vin Range: 1.8 to 3.0V
• Number Of I/os: 19
• Application: Mobil I-0 Exp-Keybd Cont,Mobil I-O Expander
• Qwerty Keypad: Yes
• Other Functions: I2C I/O & register
• Function Flag: Mobil I-O
• Package: 24-Lead LFCSP,25-Ball WLCSP

ADP5589
DEVICE ENABLE
When sufficient voltage is applied to VDD and the RST pin is
driven with a logic high level, the
mode with all settings at default. The user can configure the
device via the I
ADP5589
The
DEVICE OVERVIEW
The
Each pin can be programmed to enable the device to carry out
its various functions, as follows:
•
•
•
•
•
•
All 19 input/output pins have an I/O structure, as shown in
Figure 6.
RST pin features a debounce filter.
ADP5589
Keypad matrix decoding (11-column by 8-row matrix
maximum).
General-purpose I/O expansion (up to 19 inputs/outputs).
PWM generation.
Clock division of externally supplied source.
Dual logic function building blocks (up to three inputs,
one output).
Two reset generators.
enters a reset state and all settings return to default.
DRIVE
I/O
contains 19 multiconfigurable input/output pins.
2
C interface. When the
VDD
Figure 6. I/O Structure
100kΩ
DEBOUNCE
300kΩ
300kΩ
ADP5589
RST pin is low, the
starts up in standby
I/O
Rev. A | Page 8 of 48
Each I/O can be pulled up with a 100 kΩ or 300 kΩ resistor or
pulled down with a 300 kΩ resistor. For logic output drive, each
I/O has a 5 mA PMOS source and a 10 mA NMOS sink for
push-pull type output. For open-drain output situations, the
5 mA PMOS source is not enabled. For logic input applications,
each I/O can be sampled directly or, alternatively, sampled
through a debounce filter.
The I/O structure shown in Figure 6 allows for all GPI and GPO
functions, as well as PWM and clock divide functions. For key
matrix scan and decode, the scanning circuit uses the 100 kΩ or
300 kΩ resistor for pulling up keypad row pins and the 10 mA
NMOS sinks for grounding keypad column pins (see the Key
Scan Control section for details about key decoding).
Configuration of the device is carried out by programming an
array of internal registers via the I
device status and pending interrupts can be flagged to an
external processor via the INT pin.
The
options that are available for each model of the ADP5589.
Table 5. Available Options
Models
ADP5589ACPZ-00-R7
ADP5589ACBZ-00-R7
ADP5589ACPZ-01-R7
ADP5589ACBZ-01-R7
ADP5589ACPZ-02-R7
ADP5589ACBZ-02-R7
1
2
Reset pass-through implies that the RESET1 output (R4) follows the logic
level of the reset input pin, RST , after the oscillator has been enabled.
Special function pins are defined as R0 (Row 0), R3 (Row 3), R4 (Row 4), C4
(Column 4), C6 (Column 6), and C9 (Column 9).
ADP5589
is offered with three feature sets. Table 5 lists the
Description
All GPIOs pulled up (default option)
Reset pass-through
Pull-down on special function pins
2
C interface. Feedback of
1
2