LPC1850FET256 NXP Semiconductors, LPC1850FET256 Datasheet - Page 29

• Manufacturer Part Number: LPC1850FET256
• Description: The LPC1850FET256 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 200 kB of SRAM, and advanced peripherals including Ethernet, High Speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC1850_30_20_10
Preliminary data sheet
Symbol
P6_3
P6_4
P6_5
Pin description
P15
R16
P16
x
x
x
…continued
-
F6
F9
113
114
117 82
All information provided in this document is subject to legal disclaimers.
79
80
Rev. 3.1 — 15 December 2011
-
53
55
[3]
[3]
[3]
I; PU I/O GPIO3[2] — General purpose digital input/output pin.
I; PU I/O GPIO3[3] — General purpose digital input/output pin.
I; PU I/O GPIO3[4] — General purpose digital input/output pin.
O
-
O
-
I
-
-
I
O
O
-
-
-
-
O
I
O
-
-
-
-
Description
USB0_PPWR — VBUS drive signal (towards
external charge pump or power management unit);
indicates that the VBUS signal must be driven (active
HIGH).
Add a pull-down resistor to disable the power switch
at reset. This signal has opposite polarity compared
to the USB_PPWR used on other NXP LPC parts.
R — Function reserved.
EMC_CS1 — LOW active Chip Select 1 signal.
R — Function reserved.
T2_CAP2 — Capture input 2 of timer 2.
R — Function reserved.
R — Function reserved.
CTIN_6 — SCT input 6. Capture input 1 of timer 3.
U0_TXD — Transmitter output for USART0.
EMC_CAS — LOW active SDRAM Column Address
Strobe.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
CTOUT_6 — SCT output 6. Match output 2 of timer
1.
U0_RXD — Receiver input for USART0.
EMC_RAS — LOW active SDRAM Row Address
Strobe.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
Table
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
2.
© NXP B.V. 2011. All rights reserved.
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